參數資料
型號： SAA8110G
廠商： NXP SEMICONDUCTORS
元件分類： 數字信號處理
英文描述： Digital Signal Processor (DSP) for cameras(應用于照相中的數字信號處理器)
中文描述： 0-BIT, 28.6 MHz, OTHER DSP, PQFP80
封裝： 12 X 12 X 1.40 MM, PLASTIC, LQFP-80
文件頁數： 5/36頁
文件大?。?/td> 232K
代理商： SAA8110G
1997 Jun 13
5
Philips Semiconductors
Preliminary specification
Digital Signal Processor (DSP) for
cameras
SAA8110G
PINNING
SYMBOL
PIN
I/O
DESCRIPTION
V
DDD(C1)
CLK1
VSYNC
IN
HSYNC
IN
FI
IN
V
SSD(C1)
CCD9
CCD8
CCD7
CCD6
CCD5
CCD4
CCD3
CCD2
CCD1
CCD0
V
SSD(C2)
SCLK
V
SSA(CD)
CDAC
OUT
CDAC
RBIAS
V
DDA(CD)
SDATA
STROBE
SMP
P0
P1
SIS
V
DDD(C2)
RESET
T2
T1
T0
V
SSA(OB)
OUT3
V
DDA(O3)
OUT2
V
DDA(O2)
OUT1
V
DDA(O1)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
digital supply 1 for digital core and CLK1 related peripherals
system- or pixel clock
vertical synchronization input
horizontal synchronization input
field identification signal input
digital ground 1 for digital core and CLK1 related peripherals
(preprocessed) AD-converted CDD-signal bit 9 (MSB)
(preprocessed) AD-converted CDD-signal bit 8
(preprocessed) AD-converted CDD-signal bit 7
(preprocessed) AD-converted CDD-signal bit 6
(preprocessed) AD-converted CDD-signal bit 5
(preprocessed) AD-converted CDD-signal bit 4
(preprocessed) AD-converted CDD-signal bit 3
(preprocessed) AD-converted CDD-signal bit 2
(preprocessed) AD-converted CDD-signal bit 1
(preprocessed) AD-converted CDD-signal bit 0 (LSB)
digital ground 2 for digital core and CLK1 related peripherals
serial clock to TDA8786
analog ground for control DAC
output control DAC
pin to connect external bias resistor for control DAC
analog supply for control DAC
serial data to TDA8786
strobe to TDA8786
switch mode pulse for DC-DC
quasi-static control output pin 0
quasi-static control output pin 1
SNERT/I
2
C-bus select input signal
digital supply 2 for digital core and CLK1 related peripherals
reset input
test mode control signal bit 2
test mode control signal bit 1
test mode control signal bit 0
analog ground for the three output buffers
output buffer 3 (R, V or CVBS)
analog supply for output buffer OUT3
output buffer 2 (B, U or C)
analog supply for output buffer OUT2
output buffer 1 (G or Y)
analog supply for output buffer OUT1
O
I
O
I
I
O
O
O
O
O
I
I
I
I
I
I
I
O
I
O
I
O
I
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