參數(shù)資料
型號(hào)： SAA8110G
廠商： NXP SEMICONDUCTORS
元件分類： 數(shù)字信號(hào)處理
英文描述： Digital Signal Processor (DSP) for cameras(應(yīng)用于照相中的數(shù)字信號(hào)處理器)
中文描述： 0-BIT, 28.6 MHz, OTHER DSP, PQFP80
封裝： 12 X 12 X 1.40 MM, PLASTIC, LQFP-80
文件頁(yè)數(shù)： 28/36頁(yè)
文件大?。?/td> 232K
代理商： SAA8110G
1997 Jun 13
28
Philips Semiconductors
Preliminary specification
Digital Signal Processor (DSP) for
cameras
SAA8110G
Fig.18 SAA8110G system configuration for camera application (continued in Fig.19).
handbook, full pagewidth
P0 (optional, PPG setting)
P1 (optional, PPG settings)
CDACOUT (optional, can be used for frequency tuning)
CLK1 (to ADC and DSP)
CLK2 (to DSP, CLK2 = 2
×
CLK1)
CDSPULSE1
CDSPULSE2
CLAMPCDS (CLAMP CDS, OPB, ADC can be the same)
CLAMPOPB
CLAMPADC
PreBlank (optional)
HD (to DSP and
μ
C)
VD (to DSP and
μ
C)
FI (to DSP and
μ
C)
P0
P1
CDACOUT
CLK1
CLK2
CDSPULSE1
CDSPULSE2
CLAMPCDS
CLAMPOPB
CLAMPADC
PreBlank
Horizontal Drive
Vertical Drive
Field Id
V4
V3
V2
V1
H1
VERTICAL DRIVER
(PPG)
H2
V4 V3 V2 V1
H1
H2
Electrical
Shutter
Reset
Pulse
OGND1
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
100
nF
1 nF
1
nF
1
nF
2.2
nF
200
nF
DGND1
36
35
34
33
32
31
30
29
28
27
26
25
CLPOPB
CLK1
100 nF
100 nF
100 nF
100 nF
100 nF
OEN (optional)
(from microcontroller)
VDDD
100 nF
VDDD
CLAMPCDS
CDSPULSE1
CDSPULSE2
PBK
CLAMPOPB
PreBlank
OFDOUT
AMPOUT
AMPOUT
AGND1
VCCA1
AGCOUT
PBIN
PBOUT
ADCIN
CLPADC
Vref
1
2
3
4
5
6
7
8
9
10
11
12
TDA8786G
or
TDA8786AG
ANALOG TO DIGITAL INTERFACE
A
I
I
V
V
C
C
C
D
V
O
C
D
A
V
VR
S
VR
D
S
S
V
S
S
13 14 15 16
22
17 18 19
21
24
23
20
48 47
220 nF
220 nF
CLAMPADC
(from PPG)
46 45
39
44 43 42
40
37
38
41
VERTICAL
DRIVER BUFFER
CCD
SMP_CLK
(from DSP)
VDDD
VDDA1
VDDA1
VDDA1
VDDA1
xxV
SWITCH MODE
POWER SUPPLIES
(optional)
+
xxV
CCDout
OFD level
(optional)
1
μ
F
A
B
C
D
E
F
G
H
I
J
K
L
M
5
6
7
8
2
VD (from PPG)
3
4
5
10
μ
F
4
3
2
1
SDA
SCL
PTC
VDD
A2
100 nF
NC
WP
VSS
6
7
8
9
4.7
μ
F
12 MHz
A0/SNDA
SCL/SNCL
HD (opt.)
FIIN
A1/SNRES
10
11
83C54/
83C654
(OM-XXX)
MICRO-
CONTROLLER
EPROM
PCF8598
PCF8594
PCF8582
13
14
15
16
17
18
19
20
21
22
18 pF
18 pF
VDD
VDDD
VDDD
VDDD
VDDD
VDDD
VDDD
VDDD
P0.0/AD0
P0.1/AD1
P0.2/AD2
P0.3/AD3
P0.4/AD4
P0.5/AD5
RESET_DSP
(to DSP)
P0.6/AD6
P0.7/AD7
EA
ALE
PSEN
P2.7/A15
P2.6/A14
P2.5/A13
P2.4/A12
P2.3/A11
P2.2/A10
P2.1/A9
P2.0/A8
44
43
42
41
OEN (optional)
(to ADC)
BC848C
40
39
38
37
36
35
33
32
31
30
29
28
27
26
25
24
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6/SCL
P1.7/SDA
RST
P3.0/RxD
P3.1/TxD
P3.2/INT0
P3.3/INT1
P3.4/T0
P3.5/T1
P3.6/WR
P3.7/RD
XTAL2
XTAL1
VSS
5 V
VDDA1
VDDA2
VDDA3
5 V
5 V
VDDD
4
J
3
J
2
J
1
+
5
G
S
S
J
10 k
4.7
k
4.7
k
10 k
MGK393
digital ground
analog ground
Shutter
Reset
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