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參數(shù)資料
| 型號(hào)： | SAA7708H |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 數(shù)字信號(hào)處理 |
| 英文描述： | Car Radio Digital Signal Processor |
| 中文描述： | 汽車無線電數(shù)字信號(hào)處理器 |
| 文件頁數(shù)： | 31/60頁 |
| 文件大?。?/td> | 281K |
| 代理商： | SAA7708H |
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1998 May 19
31
Philips Semiconductors
Preliminary specification
Car Radio Digital Signal Processor
SAA7708H
Clock and data recovery from the MPX signal
Buffering of 16 bits if selected
Interfacing with the micro controller
10.15.1 C
LOCK AND DATA RECOVERY
The RDS-chain has a separate input FM_RDS. This enables RDS updates during tape play.
The RDS chain contains a third order sigma-delta AD convertor, followed by two decimation filters. The first filter passes
the multiplex band including the signals around 57 kHz and reduces the sigma- delta noise. The second filter reduces
the RDS bandwidth around 57 kHz.
The quadrature mixer converts the RDS band to the frequency spectrum around 0 Hz and contains the appropriate Q/I
signal filters. The final decoder recovers the clock and data signals. These signals are output on the RDS-Clock and Data
pins.
10.15.2 T
IMING OF
C
LOCK AND
D
ATA SIGNALS
The timing of the Clock and Data output is derived from the incoming data signal. Under stable conditions the data will
remain valid for 400
μ
s after the clock transition. The timing of the data change is 100
μ
s before a positive clock change.
This timing is suited for positive as well as negative triggered interrupts on a microprocessor. The RDS timing is shown
in Fig. 14.
During poor reception it is possible that faults in phase occur, then the duty cycle of the clock and data signals will vary
from minimum 0.5 times to a maximum of 1.5 times the standard clock periods. Normally, faults in phase do not occur
on a cyclic basis.
10.15.3 B
UFFERING OF
RDS
DATA
The repetition of the RDS data is around the 1187 Hz. This results in an interrupt on the microprocessor for every 842
uS. In a second mode, the RDS interface has a double 16 bit buffer.
RDS_CLOCK
RDS_DATA
Tpr
Thr
Tlr
Tsr
Tdr
Fig. 14 RDS timing in the direct output mode
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA7709/N107 | 制造商:PHILIPS-SEMI 功能描述: |
| SAA7709H/N103 | 功能描述:音頻 DSP DIGITAL SIGNAL PROCESSOR RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
| SAA7709H/N103,518 | 功能描述:音頻 DSP DIRAC-2 RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
| SAA7709H/N103,557 | 功能描述:音頻 DSP DIGITAL SIGNAL RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
| SAA7709H/N103/S420 | 功能描述:音頻 DSP Car radio Digital Signal Processor RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
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