![](http://datasheet.mmic.net.cn/370000/SAA7708H_datasheet_16731819/SAA7708H_23.png)
1998 May 19
23
Philips Semiconductors
Preliminary specification
Car Radio Digital Signal Processor
SAA7708H
the corresponding coefficients. The step size is freely programmable and an additional analog volume control is not
needed in this design. The SNR of the audio output at full scale is determined by the total 15 bits of the converter. The
noise at low outputs is fully determined by the noise performance of the DAC. Since it is a signed magnitude type, the
noise at digital silence is also low. As disadvantage the total THD is slightly higher than conventional D/A converters. The
typical Signal to Noise and THD versus output level are shown in Fig. 7.
10.8.4
F
UNCTION OF THE
POM
PIN
With the POM pin it is possible to switch off the reference current source of the D/A converter. The capacitor on the POM
pin determines the time after which this current has a soft switch-on. So at power-on the current audio signal outputs are
always muted. The loading of the external capacitor is done in two stages via two different current sources. The loading
starts at a current level that is 9 times lower than the current loading after the POM pin voltage has past the 1 V level.
This results in an almost dB linear behaviour. However the DAC has an a-symmetrical supply and the DC output voltage
will be half the supply voltage under functional conditions. During startup the output voltage is not defined as long as the
supply voltage is lower than the threshold voltages of the transistors and a small jump in DC is possible at startup. In this
DC voltage jump audio components can be present.
10.8.5
T
HE
F
ADER
The fader is a 5 bit I2C (bits 11-15 of $0FFC) controlled volume regulator between the front and the rear outputs. Of the
32 positions of the 5 bit I2C code position 15 is the default position in which front and rear output have the same volume
(Fig. 8). Increasing the 5 bits I2C code will keep the front channels at the same volume but will decrease the volume of
the rear channels. Decreasing the 5 bits code starting at position 15 will keep the rear channels at the same volume but
will decrease the volume of the front channels. Starting at the default position the first 12 steps decrease the volume
linearly to -26 dB, step 13 and 14 decrease until -37 dB. The positions 0 and 30 of the fader represent mute for the front-
and rear channel respectively. Position 31 is not used.
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
-40.0
-35.0
-30.0
-25.0
-20.0
-15.0
-10.0
-5.0
0.0
Position of the 5 bits I2C fader code
Fader output suppression of Front and Rear channel
dB
Front channel
Rear channel
Fig. 8 DAC fader control range