參數(shù)資料
型號(hào): SAA7348GP
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: All Compact Disc Engine ACE
中文描述: 8-BIT, MROM, 35 MHz, MICROCONTROLLER, PQFP100
文件頁數(shù): 49/60頁
文件大小: 205K
代理商: SAA7348GP
1997 Jul 11
49
Philips Semiconductors
Preliminary specification
All Compact Disc Engine (ACE)
SAA7348GP
S/N
PSRR
signal-to-noise ratio
power supply ripple rejection at
V
DDA
gain tolerance
variation of gain between
channels
channel separation
comparator FTC offset
55
45
dB
dB
note 6
G
tol
G
notes 2 and 7
12
0
+12
2
%
%
α
cs
V
offset(FTC)
Decoder analog front-end (V
DDD(pads)
= 5.0 V; V
DDD(core)
= 3.3 V; V
DDA
= 3.3 V; V
SS
= 0; T
amb
= 25
°
C)
10
60
+10
dB
mV
P
INS
: MIDLAD, REFLCA, HFIN, REFHCA
AND
I
ref
f
clk
ADC clock frequency
B
AGC
AGC bandwidth (
3 dB)
V
offset
total offset voltage
G
v(AGC
)
AGC gain:
range
step
V
i(AGC)(p-p))
AGC input signal range;
peak-to-peak value
V
i(ADC)
input range ADC plus buffer
THD
total harmonic distortion
n = 16
n = 12/16
67
18/24
7
0
+7
MHz
MHz
lsb
4.4
0.4
1.1
+12.1
2.3
dB
dB
V
1.4
36
30
25
33
10
V
dB
dB
dB
dB
k
f
s
= 5 MHz
f
s
= 10 MHz
f
s
= 18 MHz
S/N
Z
in
signal-to-noise ratio
input impedance HFIN
Digital inputs
I
NPUT
: DEFI; CMOS
INPUT WITH PULL
-
DOWN
V
IL
V
IH
R
pd(int)
C
i
Input: RST; CMOS input with hysteresis
V
th(r)
switching threshold rising
V
th(f)
switching threshold falling
V
hys
hysteresis voltage
C
i
input capacitance
I
NPUTS
: RCK
AND
SELPLL; CMOS
INPUTS
LOW-level input voltage
HIGH-level input voltage
internal pull-down resistance
input capacitance
0.3
0.7
×
V
DD
50
0.3
×
V
DD
V
DD
+ 0.3
10
V
V
k
pF
V
I
= 0
0.2
×
V
DD
0.33
×
V
DD
0.8
×
V
DD
10
V
V
V
pF
V
IL
V
IH
I
LI
C
i
LOW-level input voltage
HIGH-level input voltage
input leakage current
input capacitance
0.3
0.7
×
V
DD
10
0.3
×
V
DD
V
DD
+ 0.3
+10
10
V
V
μ
A
pF
V
I
= 0
V
DD
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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