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參數(shù)資料
| 型號： | SAA7348GP |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | All Compact Disc Engine ACE |
| 中文描述： | 8-BIT, MROM, 35 MHz, MICROCONTROLLER, PQFP100 |
| 文件頁數(shù)： | 11/60頁 |
| 文件大?。?/td> | 205K |
| 代理商： | SAA7348GP |
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1997 Jul 11
11
Philips Semiconductors
Preliminary specification
All Compact Disc Engine (ACE)
SAA7348GP
Table 1
Typical input currents for a range of values of R
IrefT
Note
1.
f
sys
is always equal to
; see Table 9.
R
IrefT
(k
)
TYPICAL CURRENT INPUT RANGE
f
sys
(1)
= 4.2336 MHz
f
sys
(1)
= 8.4672 MHz
D1, D2, D3, D4
(
μ
A)
12.000
10.909
10.000
8.889
8.000
7.273
6.667
6.154
5.581
5.106
4.706
4.286
3.871
3.529
3.200
S1, S2
(
μ
A)
6.000
5.455
5.000
4.444
4.000
3.636
3.333
3.077
2.791
2.553
2.353
2.143
1.935
1.765
1.600
V
RH
(V)
D1, D2, D3, D4
(
μ
A)
12.000
10.909
10.000
8.889
8.000
7.273
6.667
6.350
S1, S2
(
μ
A)
6.000
5.455
5.000
4.444
4.000
3.636
3.333
3.175
V
RH
(V)
200
220
240
270
300
330
360
390
430
470
510
560
620
680
750
1.891
1.719
1.576
1.396
1.261
1.146
1.051
0.970
0.880
0.805
0.742
0.675
0.610
0.556
0.504
0.946
0.860
0.788
0.698
0.631
0.573
0.526
0.500
serv2
The preset latch command can be used to select this
method of V
RH
automatic adjustment.
Alternatively, the dynamic range of the input currents can
be made dependent on the ADC reference voltage, V
RH
.
In this case, the maximum input current for the central and
satellite diodes, respectively, is:
where f
sys
= 4.2336 MHz.
V
RH
can be set to any one of 32 pre-defined levels,
selectable under software control. V
RH
is initially set to
2.5 V using the preset latch command, then incremented
or decremented one level at a time by repeatedly
resending the same commend.
7.2
Decoder functions
The SAA7348 is a multi-speed decoding device with an
internal phase locked loop clock multiplier. Several
I
i(central) max
)
f
sys
V
RH
×
1.10
×
10
6
–
×
μ
A
(
)
=
I
i(satellite) max
)
f
sys
V
RH
×
0.55
×
10
6
–
×
μ
A
(
)
=
playback speeds can be selected, depending on the
crystal frequency and the internal clock settings;
see Table 2.
The following functions are performed in the decoder
block:
Demodulation (includes sync protection circuit);
converts the 14-bit EFM data and subcode words into
8-bit symbols.
Subcode data processing.
Error correction; a t = 2, e = 4 type is used on both C1
(32 symbol) and C2 (28 symbol) frames. The error
corrector can correct up to 2 errors on the C1 level and
up to 4 errors on the C2 level. The error corrector also
contains a flag processor. Flags are assigned to
symbols when the error corrector cannot ascertain if the
symbols are definitely good. C1 generates output flags
that are used by C2. The C2 output flags are used by the
interpolator to conceal uncorrectable errors for audio
output; they are also output via the EBU signal (DOBM)
and the VALID output with I
2
S for CD-ROM applications.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA7350 | 20-BIT INPUT BITSTREAM CONVERSION DAC FOR DIGITAL AUDIO SYSTEMS |
| SAA7356HL | 1394 SBP-2 link layer controller |
| SAA7360GPB | Analog-to-Digital Converter， 18-Bit |
| SAA7366TD-T | Analog-to-Digital Converter， 18-Bit |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA7350 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:20-BIT INPUT BITSTREAM CONVERSION DAC FOR DIGITAL AUDIO SYSTEMS |
| SAA7356HL | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1394 SBP-2 link layer controller |
| SAA7360 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Bitstream conversion ADC for digital audio systems |
| SAA7360GP | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Bitstream conversion ADC for digital audio systems |
| SAA7360GPB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 18-Bit |
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