參數(shù)資料
型號(hào): SAA7324
廠商: NXP Semiconductors N.V.
英文描述: Digital servo processor and Compact Disc decoder with integrated DAC (CD10 II)(具有綜合數(shù)模轉(zhuǎn)換器(DAC)的數(shù)字伺服處理器和光盤譯碼器)
中文描述: 數(shù)字伺服處理器和光盤解碼器集成了援會(huì)(CD10型二)(具有綜合數(shù)模轉(zhuǎn)換器(DAC)的的數(shù)字伺服處理器和光盤譯碼器)
文件頁數(shù): 6/68頁
文件大?。?/td> 285K
代理商: SAA7324
2000 Jun 26
6
Philips Semiconductors
Product specification
Digital servo processor and Compact Disc
decoder with integrated DAC (CD10 II)
SAA7324
6
PINNING
SYMBOL
PIN
DESCRIPTION
HFREF
HFIN
ISLICE
V
SSA1
V
DDA1
I
ref
V
RIN
D1
D2
D3
D4
R1
R2
V
SSA2
CROUT
CRIN
V
DDA2
LN
LP
V
neg
V
pos
RN
RP
SELPLL
TEST1
CL16
DATA
WCLK
SCLK
EF
TEST2
KILL
V
SSD1
V2/V3
WCLI
SDI
SCLI
RESET
SDA
SCL
1
2
3
comparator common mode input
comparator signal input
current feedback output from data slicer
analog ground 1
analog supply voltage 1
reference current output
reference voltage for servo ADCs
unipolar current input 1 (central diode signal input)
unipolar current input 2 (central diode signal input)
unipolar current input 3 (central diode signal input)
unipolar current input 4 (central diode signal input)
unipolar current input 1 (satellite diode signal input)
unipolar current input 2 (satellite diode signal input)
analog ground 2
crystal/resonator output
crystal/resonator input
analog supply voltage 2
DAC left channel differential negative output
DAC left channel differential positive output
DAC negative reference input
DAC positive reference input
DAC right channel differential negative output
DAC right channel differential positive output
selects whether internal clock multiplier PLL is used
test control input 1 (this pin should be tied LOW)
16.9344 MHz system clock output
serial d4(1) data output (3-state)
word clock output (3-state)
serial bit clock output (3-state)
C2 error flag output (3-state)
test control input 2 (this pin should be tied LOW)
kill output (programmable; open-drain)
digital ground 1
versatile I/O: versatile input 2 or versatile output 3 (open-drain)
word clock input (for data loopback to DAC)
serial data input (for data loopback to DAC)
serial bit clock input (for data loopback to DAC)
power-on reset input (active LOW)
microcontroller interface data I/O line (I
2
C-bus; open-drain output)
microcontroller interface clock line input (I
2
C-bus)
4
(1)
5
(1)
6
7
8
9
10
11
12
13
14
(1)
15
16
17
(1)
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
(1)
34
35
36
37
38
39
40
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