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參數(shù)資料
| 型號： | SAA7187 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Digital video encoder (DENC2-SQ)(數(shù)字視頻編碼器) |
| 中文描述： | 數(shù)字視頻編碼器（DENC2 -倚）（數(shù)字視頻編碼器） |
| 文件頁數(shù)： | 3/18頁 |
| 文件大?。?/td> | 197K |
| 代理商： | SAA7187 |
Philips Semiconductors
Clock and synchronization signals of SAA7187 and SAA7188
Application note for digital video encoder
May 1994
3
2.3
The digital encoder SAA7187 and SAA7188A
synthesize all horizontal and vertical timing
as well as the color subcarrier oscillation from
the provided clock LLC, respectively crystal.
If the clock frequency deviates from its
nominal value, line and field frequency will
change accordingly. Consumer type receiver
equipment is rather tolerant regarding these
raster frequencies, and can normally accept
and follow several % deviations from the
standard raster frequencies.
Clock accuracy
But the subcarrier frequency has much
higher requirements regarding accuracy and
stability to ensure proper color decoding.
Broadcast quality class specification asks for
less than 2ppm deviation of subcarrier
frequency. Consumer type equipment may
accept up to 50ppm static deviation, but
dynamic deviation should be kept much
smaller and very slow.
In case the crystal or the provided LLC at the
digital encoder does not have the correct
frequency, the synthesized color subcarrier
frequency can still be adjusted to the required
frequency value, by programming the 32 bit
of “FSC” under subaddress 63hex to 66hex
appropriate. Subcarrier phase reset PHRES
in subaddress 70hex has then to be switched
off, i.e., set to 00. In general, such an
adjustment of “FSC” would produce a
non-standard video output signal regarding
subcarrier to line phase coupling, comparable
to a regular VCR signal. The resulting video
signal shows correct subcarrier frequency
and (slightly) incorrect raster frequencies. It
can be decoded and displayed correctly by
any equipment that could handle VCR
signals, e.g. by a consumer type television
set.
2.4
In remote genlock mode the digital encoder
runs with the line locked clock LLC,
generated by a digital multi standard decoder
(DMSD) respectively clock generator (CGC),
like SAA7110, SAA7196, SAA7197 or
SAA7157. In the decoding process the line
locked clock LLC is derived from an analog
Remote Genlock
video input signal as reference. If this input
video signal is not stable or non standard,
e.g., a camcorder play back signal, the
DMSD will control LLC to stay line locked,
which may result into a non-nominal clock
frequency. The Philips digital decoder
provides an RTC-signal (real time control
information) to enable the digital encoder
(DENC) to compensate such non-nominal
clock, if decoder and encoder are running the
same system, i.e., same sampling scheme
(CCIR or SQP) and same video norm (field
frequency, subcarrier frequency). Decoder
LLC and RTCO output signal from DMSD
must be connected to LLC and RTCI input
signal of DENC. Horizontal and vertical sync
signal of both systems can run with phase
offset. The data path can have any
processing delay, or may be not closed at all.
SAA7187 can be paired for remote genlock
operation with the SAA7110, or SAA7191B
plus SAA7197, or with SAA7196.
SAA7188A can be paired for remote genlock
operation with SAA7151B plus SAA7157.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA7188A | Digital Video Encoder (DENC2-M)(數(shù)字視頻編碼器(DENC2-M)) |
| SAA7201 | Integrated MPEG2 AVG Decoder(綜合MPEG音頻視頻圖表譯碼器) |
| SAA7201H | Integrated MPEG2 AVG decoder |
| SAA7212 | Integrated MPEG2 AVG Decoder(綜合MPEG音頻視頻圖表譯碼器) |
| SAA7212H | Integrated MPEG AVG decoder |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA7187WP | 制造商:NXP Semiconductors 功能描述: |
| SAA7188 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital Video Encoder DENC2-M |
| SAA7188A | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital Video Encoder DENC2-M |
| SAA7188AWP | 制造商:NXP Semiconductors 功能描述:COLOR SIGNAL ENCODER, PQCC68 |
| SAA7191B | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital Multistandard Colour Decoder, Square Pixel DMSD-SQP |
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