參數(shù)資料
型號: S71PL129JC0BFW9Z2
廠商: SPANSION LLC
元件分類: 存儲器
英文描述: Stacked Multi-Chip Product (MCP) Flash Memory
中文描述: SPECIALTY MEMORY CIRCUIT, PBGA64
封裝: 8 X 11.60 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-64
文件頁數(shù): 43/153頁
文件大?。?/td> 3651K
代理商: S71PL129JC0BFW9Z2
October 28, 2005 S71PL129Jxx_00_A8
S71PL129JC0/S71PL129JB0/S71PL129JA0
135
Advance
Informatio n
Absolute Maximum Ratings
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature,
etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
Recommended Operating Conditions
(See Warning Below)
Notes:
1. Maximum DC voltage on input and I/O pins is VDD+0.2V. During voltage transitions, inputs can positive overshoot to VDD+1.0V for periods
of up to 5 ns.
2. Minimum DC voltage on input or I/O pins is -0.3V. During voltage transitions, inputs can negative overshoot VSS to -1.0V for
periods of up to 5ns.
WARNING: Recommended operating conditions are normal operating ranges for the semiconductor device. All the de-
vice’s electrical characteristics are warranted when operated within these ranges.
Always use semiconductor devices within the recommended operating conditions. Operation outside these ranges can
adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet.
Users considering application outside the listed conditions are advised to contact their representative beforehand.
Package Capacitance
Test conditions: TA = 25°C, f = 1.0 MHz
Item
Symbol
Value
Unit
Voltage of VDD Supply Relative to VSS
VDD
-0.5 to +3.6
V
Voltage at Any Pin Relative to VSS
VIN, VOUT
-0.5 to +3.6
V
Short Circuit Output Current
IOUT
±50
mA
Storage temperature
TSTG
-55 to +125
°C
Parameter
Symbol
Min
Max
Unit
Supply Voltage
VDD
2.7
3.1
V
VSS
0
V
High Level Input Voltage (Note 1)
VIH
VDD * 0.8
VDD+0.2
V
High Level Input Voltage (Note 1)
VIL
-0.3
VDD * 0.2
V
Ambient Temperature
TA
-30
85
°C
Symbol
Description
Test Setup
Typ
Max
Unit
CIN1
Address Input Capacitance
VIN = 0V
5
pF
CIN2
Control Input Capacitance
VIN = 0V
5
pF
CIO
Data Input/Output Capacitance
VIO = 0V
8
pF
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