- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄368612 > S5D0127X01-Q0R0 (SAMSUNG SEMICONDUCTOR CO. LTD.) MULTISTANDARD VIDEO DECODER/SCALER PDF資料下載
參數(shù)資料
| 型號： | S5D0127X01-Q0R0 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | MULTISTANDARD VIDEO DECODER/SCALER |
| 中文描述： | 多標準視頻解碼器/倍線器 |
| 文件頁數(shù)： | 15/96頁 |
| 文件大小： | 1509K |
| 代理商： | S5D0127X01-Q0R0 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁當前第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁
ELECTRONICS
S5D0127X01 Data Sheet
MULTIMEDIA VIDEO
PAGE 15 OF 96
Modified on May/04/2000
Figure 6. Approximate Locations for the Horizontal Timing Signals
1.2.4. Vertical Timing
The vertical timing signals include VS, VAV, ODD, SCH, and PID.
The VS is used for identifying the first line of video in the vertical position. The VS leading edge can be
programmed to either track the incoming video’s serration pulses or to be aligned to the beginning of the video line
or half way, as shown in Figure 36 and Figure 37. If
VALIGN
= 0, the VS leading edge is based on the output of an
internal low pass filter, and its location is dependent on the noise conditions of the video input. The trailing edge of
VS is locked to either the beginning of the video line or half way. The half way location relative to the beginning of
the video line changes depending on current input standard and output format. If
VALIGN
= 1, the leading edge of
the VS is aligned to the beginning of the video line or half way. The trailing edge is always aligned to the beginning
of the video line. The
VSE
bit in the
CMDA
register can be programmed to shorten the VS falling edge by one
horizontal line.
The VAV signal is used for vertical cropping. The start and stop lines for VAV are programmable through the
VAVB
and
VAVE
registers, respectively.
The ODD signal signifies the current field number. When ODD is active, the current field is 1 or 3 (or 5 or 7 if in PAL
mode). The leading and trailing edges of ODD can be aligned to either the leading edge of VS (
VALIGN
= 1) or the
trailing edge of VS (
VALIGN
= 0). The signal may be used in conjunction with SCH and PID to exactly identify the
Digital video output
HS1,2
HAV
HAVB
HAVE
HSB
HSE
Blank
Active video
Active video
Chip delay
Analog video input
FS_PULSE
SLICE
SYG
BPG
CBG
CBGW
FH2
相關PDF資料 |
PDF描述 |
|---|---|
| S5D2510 | stand-alone OSD Processor |
| S5G9802X01 | MB 18C 18#20 SKT RECP RoHS Compliant: No |
| S5G9802X01-D0B0 | MB 19C 19#20 PIN RECP |
| S5K437CA | 1/4 Optical Size 640x480 (VGA) 2.8V CMOS Image Sensor |
| S5K437CX01 | 1/4 Optical Size 640x480 (VGA) 2.8V CMOS Image Sensor |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| S5D2400X | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:S5D2400X scaling image processor |
| S5D2501F | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:OSD PROCESSOR FOR MONITORS |
| S5D2508A | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:OSD PROCESSOR FOR MONITOR |
| S5D2508A01 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:OSD PROCESSOR FOR MONITOR |
| S5D2508A01-D0B0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:OSD PROCESSOR FOR MONITOR |
發(fā)布緊急采購，3分鐘左右您將得到回復。