
S3C8639/C863A/P863A/C8647/F8647
INTERRUPT STRUCTURE
5-17
FAST INTERRUPT PROCESSING
The feature called fast interrupt processing allows an interrupt within a given level to be completed in
approximately six clock cycles rather than the usual 10 clock cycles. SYM.4–SYM.2 are used to select a specific
interrupt level for fast processing and SYM.1 enables or disables fast interrupt processing.
Two other system registers support fast interrupt processing:
— The instruction pointer (IP) contains the starting address of the service routine (and is later used to swap the
program counter values), and
— When a fast interrupt occurs, the contents of the FLAGS register is stored in an unmapped, dedicated
register called FLAGS' ("FLAGS prime").
NOTES
1. For the S3C8639/C863A/C8647 microcontrollers, the service routine for any of the seven interrupt
levels (IRQ0–IRQ7) can be selected for fast interrupt processing.
The S3C8647 microcontroller has six interrupt levels (IRQ0-IRQ6) for fast interrupt processing.
2. When you use a fast interrupt in a multi-source interrupt vector, the fast interrupt may not be
processed if you use two sources as interrupt vector in normal mode. But it is possible when you use
only one source as interrupt vector.
Procedure for Initiating Fast Interrupts
To initiate fast interrupt processing, follow these steps:
1.
Load the start address of the service routine into the instruction pointer (IP).
2.
Load the interrupt level number (IRQn) into the fast interrupt selection field (SYM.4–SYM.2)
3.
Write a "1" to the fast interrupt enable bit in the SYM register.
Fast Interrupt Service Routine
When an interrupt occurs in the level selected for fast interrupt processing, the following events occur:
1.
The contents of the instruction pointer and the PC are swapped.
2.
The FLAG register values are written to the FLAGS' ("FLAGS prime") register.
3.
The fast interrupt status bit in the FLAGS register is set.
4.
The interrupt is serviced.
5.
Assuming that the fast interrupt status bit is set, when the fast interrupt service routine ends, the instruction
pointer and PC values are swapped back.
6.
The content of FLAGS' ("FLAGS prime") is copied automatically back to the FLAGS register.
7.
The fast interrupt status bit in FLAGS is cleared automatically.
Relationship to Interrupt Pending Bit Types
As described previously, there are two types of interrupt pending bits: One is the type that is automatically
cleared by hardware after the interrupt service routine is acknowledged and executed, and the other is the one
that must be cleared by the application program's interrupt service routine. You can select fast interrupt
processing for interrupts with either type of pending condition clear function — by hardware or by software.