
S3C821A/P821A
I/O PORTS
9-3
PORT 0
Port 0 pins P0.0–P0.7 can be configured on a nibble basis for general data input or output. When configured as
outputs, the pins in each nibble may optionally be set to open-drain. You can alternately configure port 0 as
additional address lines (A8–A15) for the external peripheral interface. It is possible to configure the lower nibble
as external interface address lines A8–A11, and to use the upper nibble pins for general I/O.
To access port 0, you should write or read the port 0 data register, P0 (R224, E0H, Bank 0) in set 1. The port 0
data register can't be written, however, when port 0 bits are configured as address lines for the external interface:
writing has no effect and reading only loads P0 data register with the state of the pin.
PORT 0 CONTROL REGISTER
The port 0 control register, P0CON (R224, E0H, set 1, Bank 1), controls the direction of the I/O lines and allows
an optional selection of pull-up resistor in input mode, and that of open-drain, or push-pull in output modes. The
P0CON setting "1xxxB" for each nibble configures the pins as external interface lines. The bits 4-7 control the
upper nibble pins, P0.4–P0.7, and the bits 0-3 control the lower nibble pins, P0.0–P0.3.
In normal operating mode, a reset operation clears all P0CON register values to "0". If you want to configure an
external memory area, you can use a routine to set the P0CON value to "1xxx1xxxB". This setting correctly
configures the address lines A8–A11 (lower nibble) and A12–A15 (upper nibble).
I/O PORT 0 CONTROL REGISTER (P0CON)
R224, E0H, Set 1, Bank 1, R/W
MSB
LSB
.7
.6
.5
.4
.3
.2
.1
.0
Upper nibble port configuration
Lower nibble port configuration
7 (3)
0
1
Port Mode Selection
Input mode
Input, pull-up mode
Output, push-pull mode
Output, open-drain mode
LCD segment (SEG23-SEG16)
External interface (A15-A8)
6 (2)
0
1
0
1
x
4 (0)
0
1
x
5 (1)
x
0
1
x
(‘x’ means don’t care.)
Figure 9-2. Port 0 Control Register (P0CON)