
S3C821A/P821A
RESET
RESET and POWER-DOWN
8-5
POWER-DOWN MODES
STOP MODE
Stop mode is invoked by the instruction STOP. In Stop mode, the operation of the CPU and main oscillator is
halted. All peripherals which the main oscillator is selected as a clock source stop also because main oscillator
stops. That is, the watch timer and LCD controller will not halted in stop mode if the subsystem clock is selected
as watch timer clock source. The data stored in the internal register file are retained in stop mode. Stop mode
can be released in one of three ways: by a system reset, by an internal watch timer interrupt (when subsystem
clock is selected as clock source of watch timer), or by an external interrupt.
Example:
STOP
NOP
Using
RESET
RESET to Release Stop Mode
Stop mode is released when the
RESET signal goes active (Low level): all system and peripheral control
registers are reset to their default hardware values and the contents of all data registers are retained. When the
programmed oscillation stabilization interval has elapsed, the CPU starts the system initialization routine by
fetching the program instruction stored in ROM location 0100H.
Using an External Interrupt to Release Stop Mode
External interrupts can be used to release stop mode. For the S3C821A microcontroller, we recommend using
the INT0–INT11 interrupt though P2.4–P2.7, P4.0–P4.7.
Using an Internal Interrupt to Release Stop Mode
An internal interrupt, watch timer, can be used to release stop mode because, the watch timer operates in stop
mode if the clock source of watch timer is subsystem clock. If system clock is subsystem clock, you can't use any
interrupts to release stop mode. That is, you had batter use the idle instruction instead of stop one when
subsystem clock is selected as the system clock.
Please note the following conditions for Stop mode release:
— If you release stop mode using an internal or external interrupt, the current values in system and peripheral
control registers are unchanged.
— If you use an internal or external interrupt for stop mode release, you can also program the duration of the
oscillation stabilization interval. To do this, you must make the appropriate control and clock settings before
entering stop mode.
— If you use an interrupt to release stop mode, the bit-pair setting for CLKCON.4/CLKCON.3 remains
unchanged and the currently selected clock value is used.
The internal or external interrupt is serviced when the stop mode release occurs. Following the IRET from the
service routine, the instruction immediately following the one that initiated stop mode is executed.
NOTE
Do not use stop mode if you are using an external clock source because X
IN input must be cleared
internally to V
SS to reduce current leakage, and do not configure any pins to floating node in stop mode
to reduce power consumption.