32
S29NS-P MirrorBit
TM
Flash Family
S29NS-P_00_A1 February 20, 2007
D a t a
S h e e t
( A d v a n c e
I n f o r m a t i o n )
6.3.3
8-Word, 16-Word, and 32-Word Linear Burst Read with Wrap Around
In a linear burst read operation, a fixed number of words (8, 16, or 32 words) are read from consecutive
addresses that are determined by the group within which the starting address falls. The groups are sized
according to the number of words read in a single burst sequence for a given mode (see
Table 6.10
).
For example, if the starting address in the 8-word mode is 3Ch, the address range to be read is 38-3Fh, and
the burst sequence is 3C-3D-3E-3F-38-39-3A-3Bh. Thus, the device outputs all words in that burst address
group until all word are read, regardless of where the starting address occurs in the address group, and then
terminates the burst read.
In a similar fashion, the 16-word and 32-word Linear Wrap modes begin their burst sequence on the starting
address provided to the device, then wrap back to the first address in the selected address group.
Note that in this mode the address pointer does not cross the boundary that occurs every 128 words; thus, no
additional wait states are inserted due to boundary crossing.
6.3.4
8-Word, 16-Word, and 32-Word Linear Burst without Wrap Around
If wrap around is not enabled for linear burst read operations, the 8-word, 16-word, or 32-word burst executes
up to the maximum memory address of the selected number of words. The burst stops after 8, 16, or 32
addresses and does not wrap around to the first address of the selected group.
For example, if the starting address in the 8-word mode is 3Ch, the address range to be read is 3C-43h, and
the burst sequence is 3C-3D-3E-3F-40-41-42-43h if wrap around is not enabled. The next address to be read
requires a new address and AVD# pulse. Note that in this burst read mode, the address pointer may cross the
boundary that occurs every 128 words, which incurs the additional boundary crossing wait state.
6.3.5
Configuration Registers
This device uses two 16-bit configuration registers to set various operational parameters. Upon power-up or
hardware reset, the device is capable of the asynchronous read mode and synchronous read, and the
configuration register settings are in their default state. The host system should determine the proper settings
for the entire configuration register, and then execute the Set Configuration Register command sequence
before attempting burst operations. The Configuration Register can also be read using a command sequence
(see
Table 11.1
). The following list describes the register settings.
Table 6.10
Burst Address Groups
Mode
Group Size
Group Address Ranges
8-word
8 words
0 – 7h, 8 – Fh, 10 – 17h,...
16-word
16 words
0 – Fh, 10 – 1Fh, 20 – 2Fh,...
32-word
32 words
00 – 1Fh, 20 – 3Fh, 40 – 5Fh,...
Table 6.11
Configuration Register
CR Bit
Function
Settings (Binary)
CR0.15
Reserved
(Not used)
0 = Reserved (Default)
1 = Reserved
CR0.14
Reserved
(Not used)
0 = Reserved (Default)
1 = Reserved