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參數(shù)資料
| 型號： | S1D13503F00A |
| 元件分類： | 顯示控制器 |
| 英文描述： | 1024 X 768 PIXELS CRT OR FLAT PNL GRPH DSPL CTLR, PQFP100 |
| 封裝： | QFP-100 |
| 文件頁數(shù)： | 16/20頁 |
| 文件大?。?/td> | 144K |
| 代理商： | S1D13503F00A |
5
S1D13503 Series
Internal Block Diagram
x Functional Block Descriptions
Bus Signal Translation
According to configuration setting VD2, the Bus Signal Translation block translates either MC68000 type
MPU signals or MPU controlled by a READY type signals to internal bus interface signals.
Control Registers
The register block contains the 16 internal control and configuration registers. These registers can be
accessed by either direct-mapping or using the built-in internal index register.
Sequence Controller
The Sequence Controller block generates horizontal and vertical display timings according to the
configuration registers settings.
LCD Panel Interface
The LCD Interface block performs frame rate modulation and output data pattern formatting for both passive
monochrome and passive color LCD panels.
Look-Up Table
The Look-Up Table block contains three 16 x 4-bit wide palettes. In gray shade modes, the "green" palette
can be configured for the re-mapping of 16 possible shades of gray. In color modes, all three palettes can be
configured for the re-mapping of 4096 possible colors. See Look-Up Table Architecture for details.
Port Decoder
According to configuration settings VD1, VD12-VD4, IOCS# and address lines AB9-1, the Port Decoder
validates a given I/O cycle.
Memory Decoder
According to configuration settings VD15-VD13, MEMCS# and address lines AB19-17, the Memory Decoder
validates a given memory cycle.
Data Bus Conversion
According to configuration setting VD0, the Data Bus Conversion Block maps the external data bus, either 8-
bit or 16-bit, into the internal odd and even data bus.
Bus Signal
Translation
Sequence
Controller
Port
Decoder
Memory
Decoder
Look-Up
Table
LCD
Panel
Interface
Display Data
Formatter
Data Bus
Conversion
Address
Generator
MPU/CRT
Selector
SRAM Interface
Control Registers
Timing Generator
Power Save
Oscillator
IOR#, IOW#,
IOCS#, MEMCS#,
MEMR#, MEMW#,
BHE#, AB[19:0]
READY
VWE#
VOE#
VD[15:0]
VA[15:0],
VSC0#, VSC1#
OSC1
OSC2
LCDENB
UD[3:0],
LD[3:0],
LP, YD,
XSCL,
WF (XSCL2)
DB[15:0]
x Internal Block Diagram
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S1DGPC | SLIDE SWITCH, SPDT, LATCHED, 0.05A, 48VDC, THROUGH HOLE-STRAIGHT |
| S1F | 1.2 A, 50 V, SCR, TO-92 |
| S2A | 1.5 A, 100 V, SCR, TO-92 |
| S2D | 1.5 A, 400 V, SCR, TO-92 |
| S2M | 1.5 A, 600 V, SCR, TO-92 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S1D13503F00A1 | 制造商:Epson Electronics America Inc 功能描述: |
| S1D13503F00A100 | 制造商:Epson Electronics America Inc 功能描述:LCD DRVR 3V/3.3V/5V 80-Pin TQFP |
| S1D13503F00A200 | 功能描述:LCD 驅(qū)動器 LCD CONTROLLER RoHS:否 制造商:Maxim Integrated 數(shù)位數(shù)量:4.5 片段數(shù)量:30 最大時鐘頻率:19 KHz 工作電源電壓:3 V to 3.6 V 最大工作溫度:+ 85 C 最小工作溫度:- 20 C 封裝 / 箱體:PDIP-40 封裝:Tube |
| S1D13503F01A | 制造商:EPSON 制造商全稱:EPSON 功能描述:LCD Controller ICs |
| S1D13503F01A200 | 功能描述:LCD 驅(qū)動器 LCD CONTROLLER RoHS:否 制造商:Maxim Integrated 數(shù)位數(shù)量:4.5 片段數(shù)量:30 最大時鐘頻率:19 KHz 工作電源電壓:3 V to 3.6 V 最大工作溫度:+ 85 C 最小工作溫度:- 20 C 封裝 / 箱體:PDIP-40 封裝:Tube |
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