
S1C62440/624A0/624C0/62480 TECHNICAL HARDWARE
EPSON
I-5
CHAPTER 1: INTRODUCTION
S1C624C0
Fig. 1.2.3
S1C624C0 block diagram
ROM
5,120 x 12
SYSTEM
RESET
CONTROL
CORE CPU S1C6200
OSC
INTERRUPT
CONT.
TIMER
STOP
WATCH
PROG.
TIMER
INPUT
PORT
SERIAL
INTERFACE
I/O PORT
OUTPUT
PORT
SOUND
GENERATOR
SVD
POWER
CONT.
RAM
1,152x4
LCD
DRIVER
51x16
RESET
P00–P03
P10–P13
P20–P23
P30–P33
R00–R03
R10–R13
R20–R23
R30–R33
R40–R43
VDD
VSS
VS1
CF
CA
VL1
VL5
SEG0
SEG50
COM0
COM15
OSC1
OSC2
OSC3
OSC4
VREF
K00–K03
K10–K13
TEST
SIN
SOUT
SCLK