參數(shù)資料
型號(hào)： S-4561A
廠商： Seiko Instruments Inc.
英文描述： LCD Controller-Driver With Built-in Serial and Parallel interfaces(內(nèi)置串行和并行接口的LCD控制器-驅(qū)動(dòng)器)
中文描述： LCD控制器，內(nèi)置的串行和并行接口（內(nèi)置串行和并行接口的液晶顯示控制器-驅(qū)動(dòng)器驅(qū)動(dòng)程序）
文件頁數(shù)： 33/49頁
文件大?。?/td> 461K
代理商： S-4561A
LCD Controller-Driver
S-4561A
32
Seiko Instruments Inc.
4.
Procedures from Powering ON to Display Start
The procedures from powering ON to Display Start are as follows:
Mode Setting Examples after Powering ON
5.
Instruction Execution Time
Any instructions other than the DISPLAY CLEAR are completed within the cycle time (tcyc) represented with the instruction
input timing characteristics. For instance, when the instruction input cycle time is 500
μ
sec, the instruction can be completed
within 500
μ
sec. Consequently, instructions can be input in succession without confirming the BUSY flag. Also, load to the
MPU and the current consumption can be drastically reduced. Inputting the next command within the cycle time is
prohibited.
In the DISPLAY CLEAR mode, it is necessary to write a space code in all of DDRAMs. For the write execution time, refer to
page 18,
“
Instruction Explanation
”
of this specification.
6.
Read and Write Display Data from and In MPU
The Display Data is accessed from the MPU to DDRAM, CGRAM, ICONRAM or ICON BLINK RAM by executing the READ
or WRITE command following the ADDRESS SETTING command of individual RAMs. Always execute the ADDRESS
SETTING command before executing the READ command. When the ADDRESS SETTING command is not executed,
correct display data cannot be read. After executing the READ or WRITE command, the column address is incremented or
decremented depending upon the value of the ID of the ENTRY MODE Setting. Consequently, when the cycle time
represented
G
DL=1
8-bit data length
interface
2-line x 12-column
Normal Instruction
5-dot font
G
N=0
G
MS=0
G
DT=0
0
Setting Examples:
RS
0
R/WX
0
DB7
0
DB6
1
DB5
1
DB4
0
DB3
0
DB2
0
DB1
-
DB0
0
0
0
0
0
0
1
1
1
0
0
0
0
0
1
1
0
1
0
-
G
DL=1
8-bit data length
interface
2-line x 12-column
Extended Instruction
5-dot font
G
N=0
G
MS=1
G
DT=0
Normal Function Setting
0
0
0
0
0
0
0
1
0
0
Powering ON
RESX Input
Wait Time
Initialize.
Wait for BUSY cancellation.
When you do not want monitor BUSY*, wait for 2.0 msec at f
osc
=34 kHz.
Extended Function Setting
G
ID=0
G
S=0
Decrement
No Display Shift
Display ON/OFF
G
D=1
G
C=1
G
B=0
Display ON
Cursor Display ON
Cursor Blink OFF
Entry Mode Setting
Power Save Release
0
0
0
0
0
0
0
0
0
0
G
PS=0
Power Save Cancel
*
When BUSY is canceled, this IC is set to the power save mode (PS=1) .
Set the wait time twice as long as f
osc
35 clock.
Bias Select
0
0
0
1
0
1
0
0
-
1
G
MLC=0
No COM output inversion
G
MLS=0
No SEG output inversion
G
BS5=1 1/5 bias
Write in the specified instruction set, CGRAM, DDRAM, and ICONRAM.
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