
Seiko Instruments Inc.
1
LCD Controller-Driver
S-4561A
The S-4561A is a 17-common x 60-segment output character LCD
controller-driver with built-in serial and parallel interfaces. The S-4561A
incorporates CGROM, making character display possible. Independently
of the CPU, display on the LCD panel is executed via the internal
oscillating circuit or clock input. The S-4561A has a wide variety of
command instructions which minimize the load of the CPU. It also
features a wide voltage range, low power consumption, and it is provided
with a power save function, making the S-4561A a suitable display
device for applications in portable electronics.
Features
Display Area
5-dot font
12-column x 2-line (+4 columns)
24-column x 1-line (+8 columns)
6-dot font
10-column x 2-line (+6 columns)
20-column x 1-line (+12 columns)
Values in parentheses indicate the number of columns
outside the display area.
Icon Display
60 icons (max.)
Icons can be displayed on the upper and lower panel.
Fonts: 5-dot display mode and 6-dot display mode
Interface
4-bit, 8-bit high-speed parallel interface (80-/68-Family CPU)
Serial interface
Driver Output
60 segments
16 commons+ Icon common :
Character Generator ROM (CGROM)
9600 bits, 5
×
8 bits character font, 240 characters
Character Generator RAM (CGRAM)
8 character x 5 x 8=320 bits
Display Data RAM (DDRAM)
Duty Cycle:1/17
Internal LCD Drive Bias Voltage Generator
Internal Bias Resistor :
Command selection
1/5 or 1/4 bias
External Bias Resistor :
Free setting of 1/2 bias or more
Normal Instructions
Display Clear, Cursor Home, Display
ON/OFF, Display Character Blink,
Cursor Shift, Display Shift, Cursor
ON/OFF
Extended Instructions
Contrast Adjustment, Smooth Scroll
Control, Icon Control, Icon Blink, Bias
Resistor Select, Change of Number of
Display Columns, Power Save, Icon Only
Display, Booster Drive Frequency Select
Reset Circuit : Hardware Reset
Internal Booster :
Dual Booster
Power Supply Voltage Range
Logic Power :
LCD Drive Power : 2.7 V to 6.5 V
Low Current Consumption :
Approx. 0
μ
A (during power save
operation)
Delivered on gold bump bare chips,
Notice that isolation of the IC from light exposure
is not taken into account for this IC design.
Be sure to take measures not to expose light to
the surface, back, or side of the IC in order to
prevent this IC from malfunctioning.
2.4 V to 5.5 V
2 lines x 16 characters=2 x 16 x 8=256 bits
(4 characters are displayed outside the display area)
Display Clock
Either internal CR oscillating circuit or external clock input :
CR oscillation: 34 kHz
(Frame Frequency=76.9 Hz)