參數(shù)資料
型號: S-4561A
廠商: Seiko Instruments Inc.
英文描述: LCD Controller-Driver With Built-in Serial and Parallel interfaces(內(nèi)置串行和并行接口的LCD控制器-驅(qū)動器)
中文描述: LCD控制器,內(nèi)置的串行和并行接口(內(nèi)置串行和并行接口的液晶顯示控制器-驅(qū)動器驅(qū)動程序)
文件頁數(shù): 22/49頁
文件大?。?/td> 461K
代理商: S-4561A
LCD Controller-Driver
S-4561A
Seiko Instruments Inc.
21
1.7 CGRAM ADDRESS SETTING
Sets binary
A5A4A3A2A1A0
to the CGRAM Address Counter.
After executing this command, data is written from the CPU and read in the CGRAM.
1.8 DDRAM ADDRESS SETTING
Sets binary
A4A3A2A1A0
to the DDRAM Address Counter.
After executing this command, data is written from the CPU and read in the DDRAM.
1.9 BUSY FLAG/ADDRESS READ
Reads the BUSY flag and the content of
A5A4A3A2A1A0
of the Address Counter. Outputs BUSY flag BF
1
to DB7 during
execution of a command. Execution of any command excluding the DISPLAY CLEAR is completed within the command
cycle time. Therefore, confirmation of the BUSY flag is not needed.
The Read Address Counter reads the contents of the RAM address counter accessed just before executing this command
among DDRAM, CGRAM, ICONRAM, and ICON BLINK RAM.
1.10
DATA WRITE
Writes binary data
D7D6D5D4D3D2D1D0
in CGRAM, DDRAM, ICONRAM, and ICON BLINK RAM. Prior to data write,
execute the desired RAM ADDRESS SETTING command to select an appropriate RAM. Addresses after write are
incremented or decremented depending upon the ID value in the entry mode.
Table 24 Length of Data of Each Memory
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
DDRAM
CGRAM
ICONRAM
ICON BLINK RAM
D
7
D
6
D
5
D
4
D
4
D
4
D
4
D
3
D
3
D
3
D
3
D
2
D
2
D
2
D
2
D
1
D
1
D
1
D
1
D
0
D
0
D
0
D
0
*
*
*
*
*
*
*
*
*
1.11
DATA READ
Reads binary
D7D6D5D4D3D2D1D0
from CGRAM, DDRAM, ICONRAM, ICON BLINK RAM. Prior to data write, execute
the desired RAM ADDRESS SETTING command to select an appropriate RAM. Addresses after write are incremented or
decremented depending upon the ID value in the entry mode.
RS
0
R/WX
0
DB7
0
DB6
1
DB5
A
5
DB4
A
4
DB3
A
3
DB2
A
2
DB1
A
1
DB0
A
0
Normal
RS
0
R/WX
0
DB7
1
DB6
-
DB5
-
DB4
A
4
DB3
A
3
DB2
A
2
DB1
A
1
DB0
A
0
Normal
- : Don't care
RS
0
R/WX
1
DB7
BF
DB6
0
DB5
A
5
DB4
A
4
DB3
A
3
DB2
A
2
DB1
A
1
DB0
A
0
Normal
RS
1
R/WX
0
DB7
D
7
DB6
D
6
DB5
D
5
DB4
D
4
DB3
D
3
DB2
D
2
DB1
D
1
DB0
D
0
Normal
RS
1
R/WX
1
DB7
D
7
DB6
D
6
DB5
D
5
DB4
D
4
DB3
D
3
DB2
D
2
DB1
D
1
DB0
D
0
Normal
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