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參數(shù)資料
| 型號： | RTL8019AS |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Realtek Full-Duplex Ethernet Controller with Plug and Play Function (RealPNP) |
| 中文描述： | 瑞昱全雙工以太網(wǎng)控制器即插即用功能（RealPNP） |
| 文件頁數(shù)： | 6/50頁 |
| 文件大?。?/td> | 992K |
| 代理商： | RTL8019AS |
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8019AS.doc
2001-05-10
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SPECIFICATION
RTL8019AS
6
4. PIN DESCRIPTIONS
4.1. Power Pins
No.
Name
Type
Description
6, 17, 47, 57, 70,
89
VDD
P
+5V DC power
14, 28, 44, 52,
83, 86
GND
P
Ground
4.2. ISA Bus Interface Pins
No.
Name
Type
Descriptions
34
AEN
I
Address Enable. This ISA signal must be low for a valid I/O
command.
97-100, 1-4
INT7-0
O
Interrupt request lines which are mapped to IRQ15, IRQ12,
IRQ11, IRQ10, IRQ5, IRQ4, IRQ3, IRQ2/9 respectively.
Only one line is selected to reflect the interrupt requests at
one time. All other lines are tri-stated. The RTL8019AS also
uses these pins as inputs to monitor the actual state of the
corresponding interrupt lines on ISA bus. The result is
recorded in the INTR register, which may be used by software
to detect interrupt conflict.
35
IOCHRDY
O
This ISA signal is driven low to insert wait cycles to current
host read/write command.
96
IOCS16B
[SLOT16]
O
Upon power-on reset, this pin acts as an input named
SLOT16 to detect whether a 16-bit or 8-bit slot is in use. To
do this, it is connected to a pull-down resistor (about 27KW)
externally. At the falling edge of RSTDRV, the RTL8019AS
senses this pin's state. If it is sensed high, the adapter is
thought to be placed on a 16-bit slot where this pin is
connected to the host's IOCS16B pin, which is typically
pulled up by a 300W resistor on the mother board. If it is
sensed low, the adapter is thought to be placed on an 8-bit
slot where this pin is merely pulled low by the 27KW resistor.
After having latched the input state, this pin is switched as
the IOCS16B signal which is an open-drain output and is
driven low during a 16-bit host data transfer. It is decoded
from AEN and SA9-0.
29
IORB
I
Host I/O read command.
30
IOWB
I
Host I/O write command.
33
RSTDRV
I
High active hardware reset signal from the ISA bus. Pulses
with high level less than 800ns are ignored.
27-18, 16-
15, 13-7, 5
SA19-0
I
Host address bus. SA10 is added to implement the fully
decode of PnP ports, address 279h and A79h. In RTL8019,
SA10 is not decoded. In RTL8019AS, SA10 should be 0 for a
valid access to PnP ports.
87-88, 90-
95, 43-36
SD15-0
I/O
Host data bus.
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