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參數(shù)資料
| 型號(hào)： | RTL8019AS |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Realtek Full-Duplex Ethernet Controller with Plug and Play Function (RealPNP) |
| 中文描述： | 瑞昱全雙工以太網(wǎng)控制器即插即用功能（RealPNP） |
| 文件頁數(shù)： | 32/50頁 |
| 文件大小： | 992K |
| 代理商： | RTL8019AS |
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8019AS.doc
2001-05-10
·R￥bééa￥÷|3--¤￥q
SPECIFICATION
RTL8019AS
32
At the end of this process, one card remains. This card is assigned a handle referred to as the
Card
Select Number
(CSN) that will be used later to select the card. Cards which have been assigned a
CSN will not participate in subsequent iterations of the isolation protocol. Cards must be assigned a
CSN before they will respond to the other PnP commands.
It should be noted that the protocol permits the 8-bit checksum to be stored in non-volatile memory
on the card or generated by the on-card logic in real-time. The checksum algorithm is implemented
as a
Linear Feedback Shift Register
(LFSR), which is shown in Figure 3.
1
0
2
3
4
5
6
7
1
0
1
0
1
0
1
0
Vendor ID/
Serial number
Read of Serial
Isolation register
Reset values
Shift out
Figure 3. Checksum LFSR
The LFSR resets to 6AH upon receiving the Wake[CSN] command. The next shift value for the
LFSR is calculated as LFSR[1] XOR LFSR[0] XOR Serial Data. The LFSR is shifted right one bit
at the conclusion of each pair of reads to the Serial Isolation register. LFSR[7] is assigned the next
shift value described above.
After the first 64 pairs of reads of the Serial Isolation register, the LFSR will have the value of
serial identifier checksum.
Plug and Play cards must not drive the IOCHRDY signal during serial isolation. However, cards
may drive IOCHRDY at any other time.
Software Protocol
The Plug and Play software sends the initiation key to all Plug and Play cards to place them into
configuration mode. The software is then ready to perform the isolation protocol.
The Plug and Play software generates 72 pairs of I/O read cycles from the READ_DATA port. The
software checks the data returned from each pair of I/O reads for the 55H or AAH driven by the
hardware. If both 55H or AAH are read back, then the software assumes that the hardware had a
"1" bit in that position. All other results are assumed to be a "0".
During the first 64 bits, software generates a checksum using the received data. The checksum is
compared with the checksum read back in the last 8 bits of the sequence.
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