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參數(shù)資料
| 型號： | RT9238CS |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | VRM 8.5 PWM AND TRIPLE LINEAR POWER SYSTEM CONTROLLER |
| 中文描述： | VRM電源8.5脈寬調(diào)制和三線性電源系統(tǒng)控制器 |
| 文件頁數(shù)： | 14/24頁 |
| 文件大?。?/td> | 434K |
| 代理商： | RT9238CS |
RT9238
Preliminary
www.richtek-ic.com.tw
14
DS9238-01 July 2001
Fig.6 Current Limiting Setting
OUT1 Voltage Program
The output voltage of the PWM converter is
programmed to discrete levels between 1.090V and
1.865V which are shifted high 40mV from 1.050V to
1.825V for voltage droop gap tuning. This output
(OUT1) is designed to supply the core voltage of
Intel’s advanced microprocessors. The voltage
identification (VID) pins program an internal voltage
reference (DACOUT) with a TTL-compatible 5-bit
digital-to-analog converter (DAC). The level of
DACOUT also sets the PGOOD and OVP thresholds.
Table 1 specifies the DACOUT voltage for the
different combinations of connections on the VID
pins. The VID pins can be left open for a logic 1 input,
since they are internally pulled to the VAUX pin
through 5K
resistors. Changing the VID inputs
during operation is not recommended and could
toggle the PGOOD signal and exercise the over-
voltage protection. The output voltage program is
Intel VRM8.5 compatible.
Table 1. VOUT1 Voltage Program
Pin Name
VID4
VID3
VID2
VID1
VID0
VID25
Normal OUT1 Voltage
DACOUT
0
0
1
0
0
0
1.050+40mV=1.090
0
0
1
0
0
1
1.075+40mV=1.115
0
0
0
1
1
0
1.100+40mV=1.140
0
0
0
1
1
1
1.125+40mV=1.165
0
0
0
1
0
0
1.150+40mV=1.190
0
0
0
1
0
1
1.175+40mV=1.215
0
0
0
0
1
0
1.200+40mV=1.240
0
0
0
0
1
1
1.225+40mV=1.265
0
0
0
0
0
0
1.250+40mV=1.290
0
0
0
0
0
1
1.275+40mV=1.315
0
1
1
1
1
0
1.300+40mV=1.340
0
1
1
1
1
1
1.325+40mV=1.365
0
1
1
1
0
0
1.350+40mV=1.390
0
1
1
1
0
1
1.375+40mV=1.415
0
1
1
0
1
0
1.400+40mV=1.440
0
1
1
0
1
1
1.425+40mV=1.465
0
1
1
0
0
0
1.450+40mV=1.490
0
1
1
0
0
1
1.475+40mV=1.515
0
1
0
1
1
0
1.500+40mV=1.540
To be continued
+
_
GATE
CONTROL
PWM
OC
DRIVE
VCC
UGATE
PHASE
R
OCSET
OCSET
I
OCSET
200
μ
A
V
PHASE
= V
IN
- V
DS
V
OCSET
= V
IN
- V
SET
V
SET+
OVER-CURRENT TRIP:
V
DS
>
V
SET
iD
×
R
DS(ON)
>
I
OCSET
×
R
OCSET
V
IN
= +5V
i
D
V
DS+
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