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參數資料
| 型號： | RF1S30N06LESM |
| 廠商： | Harris Corporation |
| 英文描述： | 30A, 60V, ESD Rated, Avalanche Rated, Logic Level N-Channel Enhancement-Mode Power MOSFETs |
| 中文描述： | 30A條，60V的額定靜電，額定雪崩，邏輯電平N溝道增強型功率MOSFET |
| 文件頁數： | 5/8頁 |
| 文件大?。?/td> | 188K |
| 代理商： | RF1S30N06LESM |
2004 Fairchild Semiconductor Corporation
RFP30N06LE, RF1S30N06LESM Rev. B1
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
NOTE: Refer to Fairchild Application Notes AN7254 and AN7260.
FIGURE 13. NORMALIZED SWITCHING WAVEFORMS FOR
CONSTANT GATE CURRENT
Test Circuits and Waveforms
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
FIGURE 16. SWITCHING TIME TEST CIRCUIT
FIGURE 17. RESISTIVE SWITCHING WAVEFORMS
Typical Performance Curves
Unless Otherwise Specified
(Continued)
2000
1500
500
0
0
5
10
15
20
25
C
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
C
RSS
1000
C
OSS
C
ISS
V
GS
= 0V, f = 1MHz
C
ISS
= C
GS
+ C
GD
C
RSS
= C
GD
C
OSS
≈
C
DS
+ C
GD
60
45
30
15
0
5.0
3.75
2.5
1.25
0
D
,
G
,
V
DD
= BV
DSS
V
DD
= BV
DSS
0.75 BV
DSS
0.50 BV
DSS
0.25 BV
DSS
R
L
= 2.0
I
G(REF)
= 0.62mA
V
GS
0.75 BV
DSS
0.50 BV
DSS
0.25 BV
DSS
I
G(REF)
I
G(ACT)
t, TIME (s)
20
I
G(REF)
I
G(ACT)
80
t
P
V
GS
0.01
L
I
AS
+
-
V
DS
V
DD
R
G
VARY t
P
TO OBTAIN
REQUIRED PEAK I
AS
0V
DUT
V
DD
V
DS
BV
DSS
t
P
I
AS
t
AV
0
V
GS
0V
R
GS
R
L
DUT
+
-
V
GS
V
DS
t
ON
t
d(ON)
t
r
90%
10%
V
DS
90%
10%
t
f
t
d(OFF)
t
OFF
90%
50%
50%
10%
PULSE WIDTH
V
GS
0
0
RFP30N06LE, RF1S30N06LESM
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|---|---|
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