sss欧美一区二区三区,极品色在线精品视频,卡一卡2卡三卡4

您好，
買賣IC網(wǎng)歡迎您。
請(qǐng)登錄
免費(fèi)注冊(cè)

您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄372037 > RC4192 PDF資料下載

型號(hào)：	RC4192
文件頁(yè)數(shù)：	768/1328頁(yè)
文件大小：	9519K
代理商：	RC4192

S3 is a state in which the processor is powered down, but its

last state is being preserved in IC memory, which is kept on.

Since memory is fast, the computer can quickly come back

up to full operation. However, this state continues to draw

moderate power, due to the memory being kept

S5 is a state in which memory is off, and the last state of the

processor has been written to the hard disk. Since the disk is

slow, the computer takes longer to come back to full operation.

However, since memory is off, this state draws minimal

It is anticipated that only the following state transitions will

the transition S5

S3 will not occur, as going from save-to-

disk to save-to-memory will not be activated by any

5V Dual Output

The RC5060 controls four separate dual outputs, the first of

which is the 5V dual. This output is intended to run sub-

systems such as the USB ports. A typical application that

would require the use of 5V dual rather than +5V main for a

USB port would be the use of a USB mouse: if the system

needs to be able to awaken from sleep when the mouse is

moved, then the mouse must be powered from dual, because

main power is off.

5V dual is generated by two MOSFET switches, one from

+5V main, the other from +5V standby, as shown in Figures

3 or 4. When main power is present, the first switch is on and

the second off, and the opposite when main power is absent.

Note carefully the polarity of the MOSFET Q5 that delivers

power from the +5V main to the 5V dual: opposite to the

connection of Q6, the source is connected to the +5V main

input, and the drain is connected to the 5V dual output. This

connection must be done this way because of Q5’s body

diode. When +5V main is not present, 5V dual is still on, and

if Q5 were connected with the same polarity as Q6, the dual

voltage would conduct through the body diode of Q5,

attempting to power up the entire +5V main line. It is to

avoid this overload that Q5 must be connected as shown.

The state of the switches is controlled by the SLP_ S3# and

PWROK lines, as shown in Figure 1. When both SLP_ S3#

and PWROK are asserted, the main switch is on, and the

standby switch is off. If either line is de-asserted, the main

switch is off and the standby switch is on.

Note that Q5 and Q6 should be low-gate-voltage type

MOSFETs, with guaranteed operation at 2.7V V

to ensure full enhancement in worst case. In a typical system,

it is anticipated that full-power current will be about 1A

maximum, and standby current will be about 200mA maxi-

3.3V Dual Output

The 3.3V dual output is intended to power subsystems such

as the computer’s PCI slots. A typical application that would

require the use of 3.3V dual rather than +3.3V main for a

PCI slot would be the use of a modem: if the system needs to

be able to awaken from sleep when the modem receives

incoming data, then that slot must be powered from dual,

because main power is off. Other slots not requiring dual

power can be configured using the control signals.

3.3V dual is generated by two MOSFETs, one from +3.3V

main, the other from +5V standby, as shown in Figures 3 or

4. When main power is present, the MOSFET Q3 is turned

on as a switch, so that input and output are connected

together. When main power is absent, the MOSFET Q4 is

controlled by the RC5060 as a linear regulator, generating a

regulated 3.3V from +5V standby. As with the 5V dual, the

MOSFET Q3 must be connected as shown in the figures, to

avoid back-feed.

The state of the MOSFETs is controlled by the

PWROK lines, as shown in Figure 1. When both

and PWROK are asserted, the main switch is on, and the linear

regulator is off. If either line is de-asserted, the main switch

is off and the linear regulator is on.

Q3 and Q4 as shown in Tables 2 or 3 have different R

ratings. In a typical system, it is anticipated that full-power

current will be about 2.4A maximum, and standby current

will be about 500mA maximum. The difference in maximum

currents means that Q4 can be a less expensive device than Q3.

3.3V SDRAM Output

3.3V SDRAM output is intended to provide power to

SDRAM memory. Most systems will use this power. Those

systems using RAMBUS may also use the SDRAM power,

possibly piped to the same slots, to ensure backward compat-

ibility or even mixed operation of SDRAM with RAMBUS.

3.3V SDRAM is generated by one external MOSFET switch

from +3.3V main, and one linear regulator internal to the

RC5060 from +5V standby, as shown in Figures 3 or 4, and

in the block diagram on the front page. When main power is

present, the MOSFET Ql is turned on as a switch, so that

input and output are connected together. When main power

is absent, the internal linear regulator is on, generating a reg-

ulated 3.3V from +5V standby. As with the other duals, the

MOSFET Ql must be connected as shown in the figures, to

avoid back-feed.

The state of the external MOSFET and the internal linear

regulator is controlled by the

and PWROK lines,

and additionally the SLP_S5# line, as shown in Figure 1.

When SLP_S5# is de-asserted, both the external MOSFET

and the internal linear regulator are off, and there is no out-

put voltage on the 3.3V SDRAM line.

相關(guān)PDF資料	PDF描述
RC4193
RC4207
RC4227
RC5034
RC5035

相關(guān)代理商/技術(shù)參數(shù)	參數(shù)描述
RC4192M	制造商:未知廠家制造商全稱:未知廠家功能描述:Voltage-Mode SMPS Controller
RC4193	制造商:未知廠家制造商全稱:未知廠家功能描述:
RC4193JG	制造商:未知廠家制造商全稱:未知廠家功能描述:Analog IC
RC4193P	制造商:未知廠家制造商全稱:未知廠家功能描述:Analog IC
RC4194	制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Dual Tracking Voltage Regulators

發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

*型號(hào)	*數(shù)量	廠商	批號(hào)	封裝

<th id="i02i0"></th>

采購(gòu)需求

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

我的聯(lián)系方式

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)