參數(shù)資料
型號: R5F562N8BDFP#V0
廠商: Renesas Electronics America
文件頁數(shù): 19/148頁
文件大?。?/td> 0K
描述: MCU 32BIT FLASH 512K ROM 100LQFP
產(chǎn)品培訓(xùn)模塊: RX USB Peripheral
CAN Peripheral and API
RX 12-Bit ADC
RX Bus State Controller
RX Low Voltage Detection and Reset Sources
RX Watchdog Timer
RX 10-Bit ADC
RX 10-Bit DAC
RX Core
RX Compare Match Timer
RX DMAC
特色產(chǎn)品: RX600 Series Microcontrollers
標(biāo)準(zhǔn)包裝: 1
系列: RX600
核心處理器: RX
芯體尺寸: 32-位
速度: 100MHz
連通性: CAN,EBI/EMI,以太網(wǎng),I²C,SCI,SPI,USB
外圍設(shè)備: DMA,LVD,POR,PWM,WDT
輸入/輸出數(shù): 72
程序存儲器容量: 512KB(512K x 8)
程序存儲器類型: 閃存
RAM 容量: 96K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10/12b,D/A 1x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-LQFP
包裝: 托盤
2004 Microchip Technology Inc.
DS39609B-page 113
PIC18F6520/8520/6620/8620/6720/8720
TABLE 10-7:
PORTD FUNCTIONS
TABLE 10-8:
SUMMARY OF REGISTERS ASSOCIATED WITH PORTD
Name
Bit#
Buffer Type
Function
RD0/PSP0/AD0
bit 0
ST/TTL(1)
Input/output port pin, Parallel Slave Port bit 0 or address/data bus bit 0.
RD1/PSP1/AD1
bit 1
ST/TTL(1)
Input/output port pin, Parallel Slave Port bit 1 or address/data bus bit 1.
RD2/PSP2/AD2
bit 2
ST/TTL(1)
Input/output port pin, Parallel Slave Port bit 2 or address/data bus bit 2.
RD3/PSP3/AD3
bit 3
ST/TTL(1)
Input/output port pin, Parallel Slave Port bit 3 or address/data bus bit 3.
RD4/PSP4/AD4
bit 4
ST/TTL(1)
Input/output port pin, Parallel Slave Port bit 4 or address/data bus bit 4.
RD5/PSP5/AD5
bit 5
ST/TTL(1)
Input/output port pin, Parallel Slave Port bit 5 or address/data bus bit 5.
RD6/PSP6/AD6
bit 6
ST/TTL(1)
Input/output port pin, Parallel Slave Port bit 6 or address/data bus bit 6.
RD7/PSP7/AD7
bit 7
ST/TTL(1)
Input/output port pin, Parallel Slave Port bit 7 or address/data bus bit 7.
Legend: ST = Schmitt Trigger input, TTL = TTL input
Note 1:
Input buffers are Schmitt Triggers when in I/O mode and TTL buffers when in System Bus or Parallel
Slave Port mode.
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on
all other
Resets
PORTD
RD7
RD6
RD5
RD4
RD3
RD2
RD1
RD0
xxxx xxxx
uuuu uuuu
LATD
LATD Data Output Register
xxxx xxxx
uuuu uuuu
TRISD
PORTD Data Direction Register
1111 1111
PSPCON
IBF
OBF
IBOV
PSPMODE
0000 ----
MEMCON
EBDIS
WAIT1
WAIT0
WM1
WM0
0-00 --00
Legend: x = unknown, u = unchanged, – = unimplemented, read as ‘0’. Shaded cells are not used by PORTD.
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