PORTJ is a bidirectional I/O port
參數(shù)資料
型號: R5F56218BDLE#U0
廠商: Renesas Electronics America
文件頁數(shù): 64/148頁
文件大?。?/td> 0K
描述: MCU 32BIT FLASH 512KROM 145TFLGA
產(chǎn)品培訓模塊: RX Compare Match Timer
RX DMAC
標準包裝: 1
系列: RX600
核心處理器: RX
芯體尺寸: 32-位
速度: 100MHz
連通性: CAN,EBI/EMI,I²C,SCI,SPI,USB
外圍設備: DMA,LVD,POR,PWM,WDT
輸入/輸出數(shù): 103
程序存儲器容量: 512KB(512K x 8)
程序存儲器類型: 閃存
RAM 容量: 96K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10/12b,D/A 2x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 145-TFLGA
包裝: 托盤
PIC18F6520/8520/6620/8620/6720/8720
DS39609B-page 20
2004 Microchip Technology Inc.
PORTJ is a bidirectional I/O port(5).
RJ0/ALE
RJ0
ALE
—62
I/O
O
ST
TTL
Digital I/O.
External memory address latch enable.
RJ1/OE
RJ1
OE
—61
I/O
O
ST
TTL
Digital I/O.
External memory output enable.
RJ2/WRL
RJ2
WRL
—60
I/O
O
ST
TTL
Digital I/O.
External memory write low control.
RJ3/WRH
RJ3
WRH
—59
I/O
O
ST
TTL
Digital I/O.
External memory write high control.
RJ4/BA0
RJ4
BA0
—39
I/O
O
ST
TTL
Digital I/O.
External memory Byte Address 0 control.
RJ5/CE
RJ5
CE
—40
I/O
O
ST
TTL
Digital I/O.
External memory chip enable control.
RJ6/LB
RJ6
LB
—41
I/O
O
ST
TTL
Digital I/O.
External memory low byte select.
RJ7/UB
RJ7
UB
—42
I/O
O
ST
TTL
Digital I/O.
External memory high byte select.
VSS
9, 25,
41, 56
11, 31,
51, 70
P
Ground reference for logic and I/O pins.
VDD
10, 26,
38, 57
12, 32,
48, 71
P
Positive supply for logic and I/O pins.
AVSS(6)
20
26
P
Ground reference for analog modules.
AVDD(6)
19
25
P
Positive supply for analog modules.
TABLE 1-2:
PIC18FXX20 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
PIC18F6X20 PIC18F8X20
Legend: TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels
Analog = Analog input
I
= Input
O
= Output
P
= Power
OD
= Open-Drain (no P diode to VDD)
Note 1:
Alternate assignment for CCP2 when CCP2MX is not selected (all operating modes except
Microcontroller).
2:
Default assignment when CCP2MX is set.
3:
External memory interface functions are only available on PIC18F8X20 devices.
4:
CCP2 is multiplexed with this pin by default when configured in Microcontroller mode. Otherwise, it is
multiplexed with either RB3 or RC1.
5:
PORTH and PORTJ are only available on PIC18F8X20 (80-pin) devices.
6:
AVDD must be connected to a positive supply and AVSS must be connected to a ground reference for
proper operation of the part in user or ICSP modes. See parameter D001A for details.
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