參數(shù)資料
型號(hào): QL82SD-PT280
廠商: Electronic Theatre Controls, Inc.
英文描述: 10 High Speed Bus LVDS Serial Links bandwidth up to 5 Gbps
中文描述: 10高速總線(xiàn)LVDS串行鏈路的帶寬高達(dá)5Gbps的
文件頁(yè)數(shù): 36/60頁(yè)
文件大?。?/td> 3838K
代理商: QL82SD-PT280
www.quicklogic.com
2002 QuickLogic Corporation
QL82SD Device Data Sheet Rev C
Preliminary
36
Figure 45: SERDES Logic Cell
RAM Block Description
General Description
The QuickSD device includes multiple dual-port 2,304-bit RAM modules for implementing
RAM and FIFO functions. Each module is user-configurable into four different block
organizations. Modules can also be cascaded horizontally to increase their effective width or
vertically to increase their effective depth as shown in the following figure. The RAM can also
be configured as a modified Harvard Architecture, similar to those found in DSPs.
Figure 46: SERDES 2,304-bit RAM Module
QS
A1
A4
A5
A6
OS
OP
B1
C1
C2
MP
D1
D2
E1
NP
F1
F3
F4
F5
PS
AZ
OZ
QZ
NZ
Q2Z
FZ
MODE [1:0]
WA [9:0]
WD [17:0]
WE
WCLK
RCLK
ASYNCRD
RA [9:0]
RD [17:0]
RE
2,304-bit Module
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