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參數(shù)資料
| 型號： | Q67126-C2042 |
| 廠商： | SIEMENS AG |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-Bit CMOS Microcontroller |
| 中文描述： | 8位CMOS微控制器 |
| 文件頁數(shù)： | 47/65頁 |
| 文件大小： | 427K |
| 代理商： | Q67126-C2042 |
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Semiconductor Group
47
1997-10-01
C540U
C541U
Power Supply Current
Notes :
1) Capacitive loading on ports 0 and 2 may cause spurious noise pulses to be superimposed on the
V
OL
of ALE
and port 3. The noise is due to external bus capacitance discharging into the port 0 and port 2 pins when these
pins make 1-to-0 transitions during bus operation. In the worst case (capacitive loading > 100 pF), the noise
pulse on ALE line may exceed 0.8 V. In such cases it may be desirable to qualify ALE with a schmitt-trigger,
or use an address latch with a schmitt-trigger strobe input.
2) Capacitive loading on ports 0 and 2 may cause the
V
OH
on ALE and PSEN to momentarily fall below the
0.9
V
CC
specification when the address lines are stabilizing.
3)
I
PD
(power-down mode) is measured under following conditions:
EA = Port 0 =
V
CC
; XTAL2 = N.C.; XTAL1 =
V
SS
; RESET =
V
SS
; all other pins are disconnected.
the USB transceiver is switched off;
4)
I
CC
(active mode) is measured with:
XTAL1 driven with
t
CLCH
,
t
CHCL
= 5 ns ,
V
IL
=
V
SS
+ 0.5 V,
V
IH
=
V
CC
– 0.5 V; XTAL2 = N.C.;
EA = RESET = Port 0 = Port 1 =
V
CC
; all other pins are disconnected.
I
CC
would be slightly higher if a crystal oscillator is used (appr. 1 mA).
5)
I
CC
(idle mode) is measured with all output pins disconnected and with all peripherals disabled;
XTAL1 driven with
t
CLCH
,
t
CHCL
= 5 ns,
V
IL
=
V
SS
+ 0.5 V,
V
IH
=
V
CC
– 0.5 V; XTAL2 = N.C.;
EA = RESET =
V
ss
; Port 0 =
V
CC
; all other pins are disconnected;
6) Overload conditions occur if the standard operating conditions are exceeded, ie. the voltage on any pin
exceeds the specified range (i.e.
V
OV
>
V
CC
+ 0.5 V or
V
OV
<
V
SS
- 0.5 V). The supply voltage
V
CC
and
V
SS
must
remain within the specified limits. The absolute sum of input currents on all port pins may not exceed 50 mA.
7) Not 100% tested, guaranteed by design characterization.
8) The typical
I
CC
values are periodically measured at
T
A
= +25 C but not 100% tested.
9) The maximum
I
CC
values are measured under worst case conditions (
T
A
= 0 C and
V
CC
= 5.5 V)
Parameter
Symbol
Limit Values
Unit Test Condition
typ.
8)
max.
9)
Active mode
12 MHz
I
CC
I
CC
I
PD
15
TBD
mA
4)
Idle mode
12 MHz
TBD
TBD
mA
μ
A
5)
Power-down mode
TBD
50
V
CC
= 2
…
5.5 V
3)
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