- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄361241 > Q67126-C2042 (SIEMENS AG) 8-Bit CMOS Microcontroller PDF資料下載
參數(shù)資料
| 型號： | Q67126-C2042 |
| 廠商： | SIEMENS AG |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-Bit CMOS Microcontroller |
| 中文描述： | 8位CMOS微控制器 |
| 文件頁數(shù)： | 34/65頁 |
| 文件大?。?/td> | 427K |
| 代理商： | Q67126-C2042 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁當前第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁
Semiconductor Group
34
1997-10-01
C540U
C541U
Fail Save Mechanisms
The C540U/C541U offers enhanced fail safe mechanisms, which allow an automatic recovery from
software upset or hardware failure :
– a programmable watchdog timer (WDT), with variable time-out period from 256
μ
s up to
approx. 0.55
μ
s at 12 MHz. The WDT is not available in the C540U.
– an oscillator watchdog (OWD) which monitors the on-chip oscillator and forces the
microcontroller into reset state in case the on-chip oscillator fails; it also provides the clock for
a fast internal reset after power-on.
The watchdog timer in the C517A is a 15-bit timer, which is incremented by a count rate of
f
OSC
/12
or
f
OSC
/192. The system clock of the C517A is divided by two prescalers, a divide-by-two and a
divide-by-16 prescaler which are selected by bit WDTPSEL (WDTREL.7). For programming of the
watchdog timer overflow rate, the upper 7 bit of the watchdog timer can be written.
Figure 8-18
shows the block diagram of the watchdog timer unit.
Figure 18
Block Diagram of the Watchdog Timer
The watchdog timer can be started by software (bit SWDT) but it cannot be stopped during active
mode of the C541U. If the software fails to refresh the running watchdog timer an internal reset will
be initiated on watchdog timer overflow. For refreshing of the watchdog timer the content of the SFR
WDTREL is transfered to the upper 7-bit of the watchdog timer. The refresh sequence consists of
two consequtive instructions which set the bits WDT and SWDT each. The reset cause (external
reset or reset caused by the watchdog) can be examined by software (flag WDTS). It must be noted,
however, that the watchdog timer is halted during the idle mode and power down mode of the
processor.
MCB03384
WDCON (COH
OSC
f
-
-
-
-
OWDS
WDTS
WDT
SWDT
2
16
14
0
7
8
WDTL
WDTH
/ 6
External HW Reset
Control Logic
6
7
0
WDT Reset-Request
WDTPSEL
WDTREL
相關PDF資料 |
PDF描述 |
|---|---|
| Q67127-D970 | 8-Bit CMOS Microcontroller |
| Q67127-C970 | High Speed CMOS Logic Hex Buffers/Line Drivers with Non-Inverting 3-State Outputs 16-PDIP -55 to 125 |
| Q67127-C1009 | 8-Bit CMOS Microcontroller |
| Q67127-C1014 | 8-Bit CMOS Microcontroller |
| Q67127-D1009 | 8-Bit CMOS Microcontroller |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| Q67126-C2088 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:IC-SM-CAN CONTROLLER |
| Q67127-C1009 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:8-Bit CMOS Microcontroller |
| Q67127-C1014 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:8-Bit CMOS Microcontroller |
| Q67127-C1030 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:8-Bit CMOS Microcontroller |
| Q67127-C1031 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:8-Bit CMOS Microcontroller |
發(fā)布緊急采購，3分鐘左右您將得到回復。