Semiconductor Group
19
1997-10-01
C540U
C541U
Special Function Registers
The registers, except the program counter and the four general purpose register banks, reside in
the special function register area. The special function register area consists of two portions: the
standard special function register area and the mapped special function register area. One special
function register of the C540U/C541U (PCON1) is located in the mapped special function register
area. All other SFRs are located in the standard special function register area.
For accessing PCON1 in the mapped special function register area, bit RMAP in special function
register SYSCON must be set.
Special Function Register SYSCON (Address B1H)
Reset Value : XX10XXXXB
Bit
As long as bit RMAP is set, a mapped special function register can be accessed. This bit is not
cleared by hardware automatically. Thus, when non-mapped/mapped registers are to be accessed,
the bit RMAP must be cleared/set by software, respectively each.
The registers, except the program counter and the four general purpose register banks, reside in
the special function register area. All SFRs with addresses where address bits 0-2 are 0 (e.g. 80H,
88H, 90H, 98H, ..., F8H, FFH) are bitaddressable.
The 75 special function registers (SFRs) in the SFR area include pointers and registers that provide
an interface between the CPU and the other on-chip peripherals. The SFRs of the C540U/C541U
are listed in
table 3
to
table 4
. In
table 3
they are organized in groups which refer to the functional
blocks of the C540U/C541U.
Table 4 and table 4
illustrate the contents of the SFRs in numeric
order of their addresses.
Function
RMAP
Special function register map bit
RMAP = 0 : The access to the non-mapped (standard) special function
register area is enabled.
RMAP = 1 : The access to the mapped special function register area
(PCON1) is enabled.
7
6
5
4
3
2
1
0
EALE
RMAP
–
B1H
SYSCON
Bit No.
MSB
LSB
–
–
–
–
–
The functions of the shaded bits are not described in this section.