參數(shù)資料
型號: PSMN005-25D
廠商: NXP SEMICONDUCTORS
元件分類: JFETs
英文描述: N-channel logic level TrenchMOS transistor
中文描述: 75 A, 25 V, 0.0075 ohm, N-CHANNEL, Si, POWER, MOSFET
封裝: PLASTIC, DPAK-3
文件頁數(shù): 7/9頁
文件大?。?/td> 99K
代理商: PSMN005-25D
Philips Semiconductors
Product specification
N-channel logic level TrenchMOS
transistor
PSMN005-25D
MECHANICAL DATA
Fig.16. SOT428 surface mounting package. Centre pin connected to mounting base.
Notes
1. This product is supplied in anti-static packaging. The gate-source input must be protected against static
discharge during transport or handling.
2. Refer to SMD Footprint Design and Soldering Guidelines, Data Handbook SC18.
3. Epoxy meets UL94 V0 at 1/8".
REFERENCES
OUTLINE
VERSION
EUROPEAN
ISSUE DATE
IEC
JEDEC
EIAJ
SOT428
98-04-07
0
10
20 mm
scale
Plastic single-ended surface mounted package (Philips version of D-PAK); 3 leads
(one lead cropped)
SOT428
E
b2
D1
w
A
M
b
c
b1
L1
L
1
3
2
D
E1
HE
L2
Note
1. Measured from heatsink back to lead.
e1
e
A
A2
A
A1
y
seating plane
mounting
base
A1
(1)
D
max.
b
D1
max.
mE
HE
max.
w
my
A2
b2
b1
max.
c
E1
min.
e
e1
L1
min.
L2
L
A
max.
UNIT
DIMENSIONS (mm are the original dimensions)
0.2
0.2
mm
2.38
2.22
0.65
0.45
0.89
0.71
0.89
1.1
0.9
5.36
5.26
0.4
0.2
6.22
5.98
4.81
4.45
2.285
4.57
10.4
9.6
0.5
0.7
0.5
6.73
6.47
4.0
2.95
2.55
October 1999
7
Rev 1.100
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