參數(shù)資料
型號(hào): PSMN005-25D
廠商: NXP SEMICONDUCTORS
元件分類: JFETs
英文描述: N-channel logic level TrenchMOS transistor
中文描述: 75 A, 25 V, 0.0075 ohm, N-CHANNEL, Si, POWER, MOSFET
封裝: PLASTIC, DPAK-3
文件頁(yè)數(shù): 2/9頁(yè)
文件大?。?/td> 99K
代理商: PSMN005-25D
Philips Semiconductors
Product specification
N-channel logic level TrenchMOS
transistor
PSMN005-25D
AVALANCHE ENERGY LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
E
AS
Non-repetitive avalanche
energy
CONDITIONS
Unclamped inductive load, I
= 75 A;
t
p
= 100
μ
s; T
j
prior to avalanche = 25C;
V
DD
15 V; R
GS
= 50
; V
GS
= 5 V
MIN.
-
MAX.
120
UNIT
mJ
I
AS
Non-repetitive avalanche
current
-
75
A
THERMAL RESISTANCES
SYMBOL PARAMETER
R
th j-mb
Thermal resistance junction
to mounting base
R
th j-a
Thermal resistance junction
to ambient
CONDITIONS
MIN.
-
TYP. MAX. UNIT
-
1.2
K/W
SOT428 package, pcb mounted, minimum
footprint
-
50
-
K/W
ELECTRICAL CHARACTERISTICS
T
j
= 25C unless otherwise specified
SYMBOL PARAMETER
V
(BR)DSS
Drain-source breakdown
voltage
V
GS(TO)
Gate threshold voltage
CONDITIONS
V
GS
= 0 V; I
D
= 0.25 mA;
MIN.
25
23
1
0.5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
TYP. MAX. UNIT
-
-
-
-
1.5
2
-
-
-
2.3
5
5.8
6.2
7.5
-
14
0.02
100
0.05
10
-
500
60
-
8
-
32
-
21
-
170
-
270
-
216
-
3.5
-
7.5
-
V
V
V
V
V
T
j
= -55C
V
DS
= V
GS
; I
D
= 1 mA
T
j
= 175C
T
j
= -55C
R
DS(ON)
Drain-source on-state
resistance
V
GS
= 10 V; I
= 25 A
V
GS
= 5 V; I
D
= 25 A
V
GS
= 5 V; I
= 25 A; T
j
= 175C
m
m
m
nA
μ
A
μ
A
nC
nC
nC
ns
ns
ns
ns
nH
nH
I
GSS
I
DSS
Gate source leakage current V
GS
=
±
10 V; V
DS
= 0 V
Zero gate voltage drain
current
Total gate charge
Gate-source charge
Gate-drain (Miller) charge
Turn-on delay time
Turn-on rise time
Turn-off delay time
Turn-off fall time
Internal drain inductance
Internal source inductance
V
DS
= 25 V; V
GS
= 0 V;
T
j
= 175C
Q
g(tot)
Q
gs
Q
gd
t
d on
t
r
t
d off
t
f
L
d
L
s
I
D
= 75 A; V
DD
= 15 V; V
GS
= 5 V
V
DD
= 15 V; R
D
= 0.6
;
V
= 10 V; R
G
= 10
Resistive load
Measured tab to centre of die
Measured from source lead to source
bond pad
V
GS
= 0 V; V
DS
= 20 V; f = 1 MHz
C
iss
C
oss
C
rss
Input capacitance
Output capacitance
Feedback capacitance
-
-
-
3500
970
640
-
-
-
pF
pF
pF
October 1999
2
Rev 1.100
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