參數(shù)資料
型號: PSD834F2VA-15MI
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 256K X 8 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP52
封裝: PLASTIC, QFP-52
文件頁數(shù): 81/110頁
文件大小: 837K
代理商: PSD834F2VA-15MI
PSD813F2, PSD833F2, PSD834F2, PSD853F2, PSD854F2
72/110
AC/DC PARAMETERS
These tables describe the AD and DC parameters
of the PSD:
DC Electrical Specification
AC Timing Specification
PLD Timing
Combinatorial Timing
Synchronous Clock Mode
Asynchronous Clock Mode
Input Macrocell Timing
MCU Timing
–READ Timing
WRITE Timing
Peripheral Mode Timing
Power-down and Reset Timing
The following are issues concerning the parame-
ters presented:
In the DC specification the supply current is
given for different modes of operation. Before
calculating the total power consumption,
determine the percentage of time that the PSD
is in each mode. Also, the supply power is
considerably different if the Turbo Bit is ’0.’
The AC power component gives the PLD,
Flash memory, and SRAM mA/MHz
specification. Figures 35 and 36 show the PLD
mA/MHz as a function of the number of
Product Terms (PT) used.
In the PLD timing parameters, add the
required delay when Turbo Bit is ’0.’
Figure 35. PLD ICC /Frequency Consumption (5V range)
Figure 36. PLD ICC /Frequency Consumption (3V range)
0
10
20
30
40
60
70
80
90
100
110
VCC = 5V
50
010
15
5
20
25
HIGHEST COMPOSITE FREQUENCY AT PLD INPUTS (MHz)
I CC
(mA)
TURBO
ON
(100%)
TURBO
ON
(25%)
TURBO
OFF
TURBO
OFF
PT 100%
PT 25%
AI02894
0
10
20
30
40
50
60
VCC = 3V
010
15
5
20
25
I CC
(mA)
TURBO
ON (100%)
TURBO
ON (25%)
TURBO
OFF
TURBO
OFF
HIGHEST COMPOSITE FREQUENCY AT PLD INPUTS (MHz)
PT 100%
PT 25%
AI03100
相關(guān)PDF資料
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PSD854F2A-90MT 256K X 8 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP52
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