參數(shù)資料
型號(hào)： PSD813F4
英文描述： Flash In System Programmable Mirocomputer Peripherals(閃速，在系統(tǒng)可編程微控制器外圍器件，1M位閃速存儲(chǔ)器，256K位EEPROM，16K位SRAM)
中文描述： Flash在系統(tǒng)可編程Mirocomputer外設(shè)（閃速，在系統(tǒng)可編程微控制器外圍器件，100萬位閃速存儲(chǔ)器，256K位的EEPROM，16K的位的SRAM）
文件頁數(shù)： 80/130頁
文件大小： 650K
代理商： PSD813F4
PSD813F Family
Preliminary
76
Port C Pin
PC0
JTAG Signals
TMS
Description
Mode Select
PC1
TCK
Clock
PC3
TSTAT
Status
PC4
TERR
Error Flag
PC5
TDI
Serial Data In
PC6
TDO
Serial Data Out
Table 34. JTAG Port Signals
The
PSD813F
Functional
Blocks
(cont.)
9.6 Programming In-Circuit using the JTAG Interface
The JTAG interface on the PSD813F can be enabled on Port C (see Table 34). All memory
(Flash and EEPROM), PLD logic, and PSD configuration bits may be programmed through
the JTAG interface. A blank part can be mounted on a printed circuit board and
programmed using JTAG.
The standard JTAG signals (IEEE 1149.1) are TMS, TCK, TDI, and TDO. Two additional
signals, TSTAT and TERR, are optional JTAG extensions used to speed up program and
erase operations.
By default, on a blank PSD (as shipped from factory or after erasure), four pins on Port C
are enabled for the basic JTAG signals TMS, TCK, TDI, and TDO.
See WSI Application Note 54 for more details on JTAG In-System-Programming.
*
SR_cod and Periph Mode bits in the VM Register are always cleared to zero on power on or warm reset.
Port Configuration
MCU I/O
PLD Output
Power On Reset
Input Mode
Valid after internal
PSD configuration
bits are loaded
Tri-stated
Tri-stated
Tri-stated
Warm Reset
Input Mode
Valid
Power Down Mode
Unchanged
Depend on inputs to
PLD (address are
blocked in PD mode)
Not defined
Tri-stated
Tri-stated
Address Out
Data Port
Peripheral I/O
Tri-stated
Tri-stated
Tri-stated
Table 33. Status During Power On Reset, Warm Reset and Power Down Mode
Register
PMMR0, 2
Micro
Cells Flip
Flop status
Power On Reset
Cleared to “0”
Cleared to “0” by
internal power on
reset
Initialized based on
the selection in
PSDsoft
Configuration Menu.
Cleared to “0”
Warm Reset
Unchanged
Depend on .re and
.pr equations
Power Down Mode
Unchanged
Depend on .re and
.pr equations
VM Register*
Initialized based on
the selection in
PSDsoft
Configuration Menu
Cleared to “0”
Unchanged
All other registers
Unchanged
相關(guān)PDF資料
PDF描述
PSD813F Flash In-System-Programmable Microcontroller Peripherals(閃速，在系統(tǒng)可編程微控制器外圍器件，1M位閃速存儲(chǔ)器，256K位EEPROM，16K位SRAM)
PSD813FH(中文) Field Programmble Microcontroller Peripherals With Flash Memory(帶閃存的現(xiàn)場可編程微控制器)
PSD813FN(中文) Field Programmble Microcontroller Peripherals(帶閃存的現(xiàn)場可編程微控制器)
PSD813FN Field Programmble Microcontroller Peripherals(帶閃存的現(xiàn)場可編程微控制器)
PSD813FH Field Programmble Microcontroller Peripherals With Flash Memory(帶閃存的現(xiàn)場可編程微控制器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PSD813F4-15J 制造商:WSI 功能描述:
PSD813F4-15JI 制造商:WSI 功能描述:
PSD813F4A-90J 功能描述:SPLD - 簡單可編程邏輯器件 U 511-PSD813F2A-90J RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
PSD813F4A-90M 功能描述:SPLD - 簡單可編程邏輯器件 U 511-PSD813F2A-90M RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
PSD813F4VA-15J 功能描述:SPLD - 簡單可編程邏輯器件 U 511-PSD813F2VA-15J RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
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