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| 型號： | PSD4256G6V |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | FLASH IN-SYSTEM PROGRAMMABLE (ISP) PERIPHERALS FOR 16-BIT MCUS |
| 中文描述： | Flash在系統(tǒng)編程（ISP）外設(shè)的16位微控制器 |
| 文件頁數(shù)： | 30/100頁 |
| 文件大小： | 759K |
| 代理商： | PSD4256G6V |
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PSD4256G6V
30/100
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
Data Polling (DQ7) - DQ15 for Motorola
When erasing or programming in Flash memory,
the Data Polling Bit (DQ7/DQ15) outputs the com-
plement of the bit being entered for programming/
writing on the DQ7/DQ15 Bit. Once the Program
instruction or the WRITE operation is completed,
the true logic value is read on the Data Polling Bit
(DQ7/DQ15) (in a READ operation).
I
Data Polling is effective after the fourth WRITE
pulse (for a Program instruction) or after the
sixth WRITE pulse (for an Erase instruction). It
must be performed at the address being
programmed or at an address within the Flash
memory sector being erased.
I
During an Erase cycle, the Data Polling Bit
(DQ7/DQ15) outputs a ’0.’ After completion of
the cycle, the Data Polling Bit (DQ7/DQ15)
outputs the last bit programmed (it is a ’1’ after
erasing).
I
If the location to be programmed is in a
protected Flash memory sector, the instruction
is ignored.
I
If all the Flash memory sectors to be erased are
protected, the Data Polling Bit (DQ7/DQ15) is
reset to '0' for about 100μs, and then returns to
the value from the previously addressed
location. No erasure is performed.
Toggle Flag (DQ6) – DQ14 for Motorola
The PSD offers another way for determining when
the Flash memory Program cycle is completed.
During the internal WRITE operation and when ei-
ther FS0-FS15 or CSBOOT0-CSBOOT3 is true,
the Toggle Flag Bit (DQ6/DQ14) toggles from 0 to
’1’ and ’1’ to ’0’ on subsequent attempts to read any
word of the memory.
When the internal cycle is complete, the toggling
stops and the data read on the Data Bus D0-D7 is
the value from the addressed memory location.
The device is now accessible for a new READ or
WRITE operation. The cycle is finished when two
successive READs yield the same output data.
I
The Toggle Flag Bit (DQ6/DQ14) is effective
after the fourth WRITE pulse (for a Program
instruction) or after the sixth WRITE pulse (for
an Erase instruction).
I
If the location to be programmed belongs to a
protected Flash memory sector, the instruction
is ignored.
I
If all the Flash memory sectors selected for
erasure are protected, the Toggle Flag Bit
(DQ6/DQ14) toggles to '0' for about 100μs and
then returns to the value from the previously
addressed location.
Error Flag (DQ5) – DQ13 for Motorola
During a normal Program or Erase cycle, the Error
Flag Bit (DQ5/DQ13) is reset to ’0.’ This bit is set
to ’1’ when there is a failure during a Flash memory
Program, Sector Erase, or Bulk Erase cycle.
In the case of Flash memory programming, the Er-
ror Flag Bit (DQ5/DQ13) indicates the attempt to
program a Flash memory bit, or bits, from the pro-
grammed state, 0, to the erased state, ’1,’ which is
not a valid operation. The Error Flag Bit (DQ5/
DQ13) may also indicate a Time-out condition
while attempting to program a word.
In case of an error in a Flash memory Sector Erase
or Word Program cycle, the Flash memory sector
in which the error occurred or to which the pro-
grammed location belongs must no longer be
used. Other Flash memory sectors may still be
used. The Error Flag Bit (DQ5/DQ13) is reset after
a RESET instruction. A RESET instruction is re-
quired after detecting an error on the Error Flag Bit
(DQ5/DQ13).
Erase Time-out Flag (DQ3) – DQ11 for Motorola
The Erase Time-out Flag Bit (DQ3/DQ11) reflects
the time-out period allowed between two consecu-
tive Sector Erase instructions. The Erase Time-out
Flag Bit (DQ3/DQ11) is reset to ’0’ after a Sector
Erase cycle for a period of 100μs + 20% unless an
additional Sector Erase instruction is decoded. Af-
ter this period, or when the additional Sector Erase
instruction is decoded, the Erase Time-out Flag Bit
(DQ3/DQ11) is set to '1.'
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相關(guān)代理商/技術(shù)參數(shù) |
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| PSD4256G6V-10UI | 功能描述:CPLD - 復(fù)雜可編程邏輯器件 3.3V 8M 100ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| PSD4-36 | 制造商:Tamura Corporation of America 功能描述: |
| PSD-45 | 制造商:MEANWELL 制造商全稱:Mean Well Enterprises Co., Ltd. 功能描述:45W DC-DC Single Output Switching Power Supply |
| PSD-45_11 | 制造商:MEANWELL 制造商全稱:Mean Well Enterprises Co., Ltd. 功能描述:45W DC-DC Single Output Switching Power Supply |
| PSD-45A-05 | 功能描述:線性和開關(guān)式電源 30W 5Vout 6A Input 9.2-18VDC RoHS:否 制造商:TDK-Lambda 產(chǎn)品:Switching Supplies 開放式框架/封閉式:Enclosed 輸出功率額定值:800 W 輸入電壓:85 VAC to 265 VAC 輸出端數(shù)量:1 輸出電壓（通道 1）:20 V 輸出電流（通道 1）:40 A 商用/醫(yī)用: 輸出電壓（通道 2）: 輸出電流（通道 2）: 安裝風(fēng)格:Rack 長度: 寬度: 高度: |
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