參數(shù)資料
型號: PSD4135G2
英文描述: Flash In-System-Programmable Peripherals for 16-Bit MCUs(用于16位MCU的閃速在系統(tǒng)可編程外圍芯片)
中文描述: Flash在系統(tǒng)可編程外設的16位微控制器(用于16位微控制器的閃速在系統(tǒng)可編程外圍芯片)
文件頁數(shù): 7/96頁
文件大?。?/td> 515K
代理商: PSD4135G2
Beta Information
PSD4000 Series
3
A simple interface to 16-bit microcontrollers that use either multiplexed or
non-multiplexed busses. The bus interface logic uses the control signals generated by
the microcontroller automatically when the address is decoded and a read or write is
performed. A partial list of the MCU families supported include:
Intel 80196, 80296, 80186, and 80386EX
Motorola 68HC16, 68HC12, 683XX, and MC2001
Philips 80C51XA
Infineon C16X devices
Hitachi H8
4 Mbit Flash memory. This is the main Flash memory. It is divided into eight
equal-sized blocks that can be accessed with user-specified addresses.
Internal secondary 256 Kbit Flash boot memory. It is divided into four equal-sized
blocks that can be accessed with user-specified addresses. This secondary memory
brings the ability to execute code and update the main Flash
concurrently.
64 Kbit SRAM. The SRAM’s contents can be protected from a power failure by
connecting an external battery.
General Purpose PLD (GPLD) with 24 outputs. The GPLD may be used to implement
external chip selects or combinatorial logic function.
Decode PLD (DPLD) that decodes address for selection of internal memory blocks.
52 individually configurable I/O port pins that can be used for the following functions:
MCU I/Os
PLD I/Os
Latched MCU address output
Special function I/Os.
I/O ports may be configured as open-drain outputs.
Standby current as low as 50 μA for 5 V devices.
Built-in JTAG compliant serial port allows full-chip In-System Programmability (ISP).
With it, you can program a blank device or reprogram a device in the factory or the field.
Internal page register that can be used to expand the microcontroller address space
by a factor of 256.
Internal programmable Power Management Unit (PMU) that supports a low power
mode called Power Down Mode. The PMU can automatically detect a lack of
microcontroller activity and put the PSD4000 into Power Down Mode.
Erase/Write cycles:
Flash memory – 100,000 minimum
PLD – 1,000 minimum
15 year data retention
2.0
Key Features
3.0 PSD4000
Series
Part #
Flash
Main
Memory
Kbit
8 Sectors
Flash
Serial ISP
JTAG/ISP
Port
Boot
Memory
Kbit
(4 Sectors)
PSD4000
Series
I/O
Pins
PLD
Inputs Macrocells Macrocells Outputs
Input
Output
PLD
SRAM
Kbit
Supply
Voltage
Device
PSD4000
PSD4135G2
PSD4235G2*
52
52
66
82
24
24
Yes
Yes
4096
4096
256
256
64
64
5V
5V
24
16
Table 1. PSD4000 Product Matrix
*
See PSD4235G2 Data Sheet.
相關PDF資料
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PSD4135G2 100V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a Low Ohmic TO-257AA package. Also available with 300kRad Total Dose Rating.; A IRHYS67130CM with Standard Packaging
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PSD4135F1-70B81 LCD Display Panel; No. of Digits/Alpha:64; Display Technology:LCD; Leaded Process Compatible:Yes; Peak Reflow Compatible (260 C):Yes RoHS Compliant: Yes
PSD4135G1-70B81 LCD Character display; Leaded Process Compatible:Yes; Peak Reflow Compatible (260 C):Yes RoHS Compliant: Yes
PSD4135F2-70B81 LCD Character display; No. of Digits/Alpha:48; Display Technology:LCD; Leaded Process Compatible:Yes; Peak Reflow Compatible (260 C):Yes RoHS Compliant: Yes
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