參數(shù)資料
型號: PSD4135G2
英文描述: Flash In-System-Programmable Peripherals for 16-Bit MCUs(用于16位MCU的閃速在系統(tǒng)可編程外圍芯片)
中文描述: Flash在系統(tǒng)可編程外設的16位微控制器(用于16位微控制器的閃速在系統(tǒng)可編程外圍芯片)
文件頁數(shù): 16/96頁
文件大?。?/td> 515K
代理商: PSD4135G2
PSD4000 Series
Beta Information
12
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Port Pin 7
Port Pin 6
Port Pin 5
Port Pin 4
Port Pin 3
Port Pin 2
Port Pin 1
Port Pin 0
Data In Registers – Port A, B, C, D, E, F and G
8.0
Register Bit
Definition
All the registers in the PSD4000 are included here for reference. Detail description of the
registers are found in the Functional Block section of the Data Sheet.
Bit definitions:
Read only registers, read Port pin status when Port is in MCU I/O input Mode.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Port Pin 7
Port Pin 6
Port Pin 5
Port Pin 4
Port Pin 3
Port Pin 2
Port Pin 1
Port Pin 0
Data Out Registers – Port A, B, C, D, E, F and G
Bit definitions:
Latched data for output to Port pin when pin is configured in MCU I/O output mode.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Port Pin 7
Port Pin 6
Port Pin 5
Port Pin 4
Port Pin 3
Port Pin 2
Port Pin 1
Port Pin 0
Direction Registers – Port A, B, C, D, E, F and G
Bit definitions:
Set Register Bit to 0 = configure corresponding Port pin in Input mode (default).
Set Register Bit to 1 = configure corresponding Port pin in Output mode.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Port Pin 7
Port Pin 6
Port Pin 5
Port Pin 4
Port Pin 3
Port Pin 2
Port Pin 1
Port Pin 0
Control Registers – Ports E, F and G
Bit definitions:
Set Register Bit to 0 = configure corresponding Port pin in MCU I/O mode (default).
Set Register Bit to 1 = configure corresponding Port pin in Latched Address Out mode.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Port Pin 7
Port Pin 6
Port Pin 5
Port Pin 4
Port Pin 3
Port Pin 2
Port Pin 1
Port Pin 0
Drive Registers – Ports A, B, D, E, and G
Bit definitions:
Set Register Bit to 0 = configure corresponding Port pin in CMOS output driver (default).
Set Register Bit to 1 = configure corresponding Port pin in Open Drain output driver.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Port Pin 7
Port Pin 6
Port Pin 5
Port Pin 4
Port Pin 3
Port Pin 2
Port Pin 1
Port Pin 0
Drive Registers – Ports C and F
Bit definitions:
Set Register Bit to 0 = configure corresponding Port pin as CMOS output driver (default).
Set Register Bit to 1 = configure corresponding Port pin in Slew Rate mode.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Sec7_Prot
Sec6_Prot
Sec5_Prot
Sec4_Prot
Sec3_Prot
Sec2_Prot
Sec1_Prot Sec0_Prot
Flash Protection Register
Bit definitions: Read Only Register
Sec<i>_Prot
1 = Flash Sector <i> is write protected.
Sec<i>_Prot
0 = Flash Sector <i> is not write protected.
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