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| 型號(hào)： | PPXY8300A6T1 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | Pressure Sensor |
| 英文描述： | DIFFERENTIAL, PEIZORESISTIVE PRESSURE SENSOR, RECTANGULAR, SURFACE MOUNT |
| 封裝： | SOIC-20 |
| 文件頁(yè)數(shù)： | 19/162頁(yè) |
| 文件大小： | 4316K |
| 代理商： | PPXY8300A6T1 |
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MPXY8300 Series
Sensors
Freescale Semiconductor
115
13.6.4
RFX Transmit Control Register - XMTCR
The XMTCR register contains six control bits and two status bits for the RFX as described in
Figure 13-12. This register is accessed by writing to the RFX register address $03 using the SPI.
Table 13-6 RFX Control Register 2 Field Descriptions
Field
Description
7
RFM
RF Modulation Source — The RFM control bit selects the source of data to the RF power amplifier. The RFM
control bit is cleared by a RFX reset.
0
Data from DX internal pin from MCU
1
Data from RFX data buffer
6
POL
Data Polarity — The POL control bit selects the polarity of the data encoding for Manchester or Bi-Phase data
output. The POL control bit is cleared by a RFX reset.
0
Manchester encoding polarity as in Figure 13-5 and Bi-Phase encoding polarity as in Figure 13-7
1
Manchester encoding polarity as in Figure 13-4 and Bi-Phase encoding polarity as in Figure 13-6
5
CODE
Data Encoding — The CODE control bit selects the type of data encoding. The CODE control bit is cleared by a
RFX reset therefore defaulting to Manchester encoding.
0
Manchester encoding as in Figure 13-4 and Figure 13-5
1
B-Phase encoding as in Figure 13-6 and Figure 13-7
4-3
CPT[1:0]
Charge Pump Time — The CPT control bits select the length of time that the charge pump is on. These times
are derived from the charge pump oscillator, CFO, which runs at a nominal 10 MHz frequency with a tolerance
of ± 30%. The CPT control bits are cleared by a RFX reset.
00 Charge pump time is 30 msec
01 Charge pump time is 60 msec
10 Charge pump time is 120 msec
11 Charge pump time is 240 msec
2
AVDD
RF Supply Select 2 — This control bit connects the VRF pin to the AVDD supply voltage. The AVDD and VACP
bits should not both be set to one. This bit is set following an RFX reset.
0VRF pin disconnected from the AVDD pin
1VRF pin connected to the AVDD pin
1
VCAP
RF Supply Select 1 — The VCAP control bit connects the VRF pin to the source of supply voltage on the VCAP
pin. The AVDD and VACP bits should not both be set to one. The VCAP control bit is cleared by a RFX reset.
0VRF pin disconnected from the VCAP pin
1VRF pin connected to the VCAP pin
0
CPUMP
Charge Pump Enable — The CPUMP control bit enables the charge pump on the RFX to build up the voltage
on the external capacitor connected to the VCAP pin. The CPUMP bit remains set until the charge pump delay
time, tCHG, has elapsed or the VCAP voltage limit detector has been tripped when the voltage on the VCAP pin
reaches VCAPMAX. The CPUMP control bit can be cleared by writing a zero to it or by a RFX reset.
0
Charge pump disabled
1
Charge pump enabled and running
$03
Bit 7
6
5
4
3
2
1
Bit 0
R
SEND
RFEF
RCTS
PWR4
PWR3
PWR2
PWR1
PWR0
W
RESET:
0
Figure 13-12 RFX Transmit Control Register (XMTCR)
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