參數(shù)資料
型號： POE-VOICE-RD
廠商： Silicon Laboratories Inc
文件頁數(shù)： 90/108頁
文件大?。?/td> 0K
描述： KIT REF DESIGN PWR OVER ETHERNET
標準包裝： 1
主要目的： 參考設(shè)計，以太網(wǎng)供電（POE），語音傳輸
嵌入式： 是，MCU，8 位
已用 IC / 零件： C8051F340，CP2201，Si3400
主要屬性： 嵌入式以太網(wǎng)，以太網(wǎng)供電，8 kHz 語音采樣系統(tǒng)
次要屬性： 圖形用戶界面
已供物品： 板，線纜，電源，軟件
產(chǎn)品目錄頁面： 626 (CN2011-ZH PDF)
相關(guān)產(chǎn)品： 336-1385-ND - IC POWER OVER ETHERNET 20QFN
336-1322-ND - IC POWER OVER ETHERNET 20QFN
336-1313-ND - IC ETH CTRLR SNGL-CHIP 28QFN
336-1298-ND - IC 8051 MCU FLASH 64K 48TQFP
其它名稱： 336-1326
CP2200/1
82
Rev. 1.0
Indirect Register 2. MACCF: MAC Configuration Register
Bit 15:
Reserved. Read = 0b; Must write 0b.
Bit 14:
ABORTD: Abort Disable Bit
0: MAC will abort when excessive delay is detected and update the transmit status vector.
1: MAC will attempt to transmit indefinitely as specified in IEEE 802.3.
Bit 13:
EBBPD: Exponential Backoff after Back Pressure Disable Bit (Half-Duplex Only)
0: After incidentally causing a collision during back pressure, the MAC will use the exponential
backoff algorithm as specified in IEEE 802.3.
1: After incidentally causing a collision during back pressure, the MAC will immediately transmit
without using the exponential backoff algorithm.
Bit 12:
EBD: Exponential Backoff Disable (Half-Duplex Only)
0: MAC will use the exponential backoff algorithm as specified in IEEE 802.3.
1: MAC will immediately retransmit following a collision.
Bits 11–10:Reserved. Read = 00b; Write = don’t care.
Bit 9:
RLPRE: Reject Long Preamble
0: MAC allows any length preamble as specified in IEEE 802.3.
1: MAC rejects packets with a preamble greater than 12 bytes in length.
Bit 8:
PUREPRE: Pure Preamble Enforcement
0: No preamble checking is performed.
1: MAC will verify the content of the preamble to ensure it contains 0x55 and is error-free. Packets
with an invalid preamble will be rejected.
Bit 7–6:
PADMD[1:0]: Pad Mode
Note: This bit field is ignored if PADEN is cleared to ‘0’. See Table 21 for a complete description.
Bit 5:
PADEN: Pad Enable Bit (must be set to 0 in half-duplex operation)
Note: See Table 21 for a complete description.
Bit 4:
CRCEN: CRC Enable Bit
Note: This bit must be set to ‘1’ if padding is enabled.
0: CRC will not be appended. Frames presented to the MAC must contain CRC.
1: CRC will be appended.
R/W
Reserved ABORTD
EBBPD
EBD
Reserved
RLPRE
PUREPRE
Bit15
Bit14
Bit13
Bit12
Bit11
Bit10
Bit9
Bit8
R/W
Default Value
PADMD1 PADMD0
PADEN
CRCEN PHEADER Reserved LENCHK FLLDPLX
0x0000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
MACADDR:
0x01
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