參數(shù)資料
型號(hào)： PNX8526EH
廠商： NXP SEMICONDUCTORS
元件分類： 消費(fèi)家電
英文描述： Programmable source decoder with integrated peripherals
中文描述： SPECIALTY CONSUMER CIRCUIT, PBGA456
封裝： 35 X 35 MM, 1.8 MM HEIGHT, PLASTIC, MS-034, SOT610-1, HBGA-456
文件頁數(shù)： 44/59頁
文件大小： 3319K
代理商： PNX8526EH
Philips Semiconductors
PNX8526
Programmable Source Decoder with Integrated Peripherals
Preliminary data
Rev. 01 – 6 October 2003
44 of 59
9397 750 11715
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
[1]
Minimum delay is the minimum time after the clock edge that a valid signal state from the previous
cycle will begin transition to the next state (become invalid). Maximum delay is the maximum time
after the clock edge that a signal state is valid for the next cycle.
Fig 6.
PCI timing
Table 23:
Symbol
t
su
t
h
t
h
t
su
t
h
PCI CLK-referenced input timing
Parameter
PCI_AD[31:0], CBE[3:0], PCI_FRAME, PCI_IRDY
PCI_AD[31:0] hold
PCI_C/BE[3:0], PCI_FRAME, PCI_IRDY, PCI_IDSEL hold
PCI_GNT setup
PCI_GNT hold
Min
7
0
0
10
0
Unit
ns
ns
ns
ns
ns
Table 24:
Symbol
t
OD
t
OD
t
OD
t
OD
t
OD
PCI CLK-referenced output valid timing
Parameter
PCI_AD[31:0], PCI_CBE[3:0]
PCI_DEVSEL, PCI_PAR
PCI_STOP
PCI_TRDY
PCI_REQ
Min
2
2
2
2
2
Max
11
11
11
11
12
Unit
ns
ns
ns
ns
ns
handbook, 4 columns
PCI CLOCK
PCI-XIO
INPUTS
PCI-XIO
OUTPUTS
MCE544
tsu
tOD(min)
tOD(max)
th
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