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鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� PIC18F4539-I/ML
寤犲晢锛� Microchip Technology
鏂囦欢闋佹暩(sh霉)锛� 184/322闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC MCU FLASH 12KX16 EE A/D 44QFN
鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� Asynchronous Stimulus
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 45
绯诲垪锛� PIC® 18F
鏍稿績铏曠悊鍣細 PIC
鑺珨灏哄锛� 8-浣�
閫熷害锛� 40MHz
閫i€氭€э細 I²C锛孲PI锛孶ART/USART
澶栧湇瑷�(sh猫)鍌欙細 娆犲妾㈡脯(c猫)/寰�(f霉)浣嶏紝LVD锛孭OR锛孭WM锛學DT
杓稿叆/杓稿嚭鏁�(sh霉)锛� 32
绋嬪簭瀛樺劜(ch菙)鍣ㄥ閲忥細 24KB锛�12K x 16锛�
绋嬪簭瀛樺劜(ch菙)鍣ㄩ鍨嬶細 闁冨瓨
EEPROM 澶у皬锛� 256 x 8
RAM 瀹归噺锛� 1408 x 8
闆诲 - 闆绘簮 (Vcc/Vdd)锛� 4.2 V ~ 5.5 V
鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� A/D 8x10b
鎸暕鍣ㄥ瀷锛� 鍏�(n猫i)閮�
宸ヤ綔婧害锛� -40°C ~ 85°C
灏佽/澶栨锛� 44-VQFN 瑁搁湶鐒婄洡
鍖呰锛� 绠′欢
閰嶇敤锛� 444-1001-ND - DEMO BOARD FOR PICMICRO MCU
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PIC18FXX39
DS30485A-page 262
Preliminary
2002 Microchip Technology Inc.
IDD
Supply Current(2)
D010C
PIC18LFXX39
鈥�10
25
mA
EC, ECIO osc configurations
VDD = 4.2V, -40
掳C to +85掳C
D010C
PIC18FXX39
鈥�
10
25
mA
EC, ECIO osc configurations
VDD = 4.2V, -40
掳C to +125掳C
D013
PIC18LFXX39
鈥�
10
15
25
mA
HS osc configuration
FOSC = 25 MHz, VDD = 5.5V
HS + PLL osc configurations
FOSC = 10 MHz, VDD = 5.5V
D013
PIC18FXX39
鈥�
10
15
25
mA
HS osc configuration
FOSC = 25 MHz, VDD = 5.5V
HS + PLL osc configurations
FOSC = 10 MHz, VDD = 5.5V
IPD
Power-down Current(3)
D020
PIC18LFXX39
鈥�
0.08
0.1
3
0.9
4
10
A
VDD = 2.0V, +25
掳C
VDD = 2.0V, -40
掳C to +85掳C
VDD = 4.2V, -40
掳C to +85掳C
D020
D021B
PIC18FXX39
鈥�
.1
3
15
.9
10
25
A
VDD = 4.2V, +25
掳C
VDD = 4.2V, -40
掳C to +85掳C
VDD = 4.2V, -40
掳C to +125掳C
23.1
DC Characteristics: PIC18FXX39 (Industrial, Extended)
PIC18LFXX39 (Industrial) (Continued)
PIC18LFXX39
(Industrial)
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40掳C
鈮� TA 鈮� +85掳C for industrial
PIC18FXX39
(Industrial, Extended)
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40掳C
鈮� TA 鈮� +85掳C for industrial
-40掳C
鈮� TA 鈮� +125掳C for extended
Param
No.
Symbol
Characteristic
Min
Typ
Max Units
Conditions
Legend: Shading of rows is to assist in readability of the table.
Note 1: This is the limit to which VDD can be lowered in SLEEP mode, or during a device RESET, without losing RAM data.
2: The supply current is mainly a function of the operating voltage and frequency. Other factors, such as I/O pin
loading and switching rate, oscillator type, internal code execution pattern and temperature, also have an
impact on the current consumption.
The test conditions for all IDD measurements in active Operation mode are:
OSC1 = external square wave, from rail-to-rail; all I/O pins tri-stated, pulled to VDD
MCLR = VDD; WDT enabled/disabled as specified.
3: The power-down current in SLEEP mode does not depend on the oscillator type. Power-down current is
measured with the part in SLEEP mode, with all I/O pins in hi-impedance state and tied to VDD or VSS, and all
features that add delta current disabled (such as WDT, Timer1 Oscillator, BOR, etc.).
4: The LVD and BOR modules share a large portion of circuitry. The
IBOR and ILVD currents are not additive.
Once one of these modules is enabled, the other may also be enabled without further penalty.
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PIC18F4539T-E/ML 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 24KB 1408 RAM 32 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT
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