參數(shù)資料
型號： PIC12F635-I/SN
廠商： Microchip Technology
文件頁數(shù)： 28/74頁
文件大?。?/td> 0K
描述： IC MCU FLASH 1KX14 8SOIC
產(chǎn)品培訓(xùn)模塊： Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝： 100
系列： PIC® 12F
核心處理器： PIC
芯體尺寸： 8-位
速度： 20MHz
外圍設(shè)備： 欠壓檢測/復(fù)位，POR，WDT
輸入/輸出數(shù)： 5
程序存儲器容量： 1.75KB（1K x 14）
程序存儲器類型： 閃存
EEPROM 大小： 128 x 8
RAM 容量： 64 x 8
電壓 - 電源 (Vcc/Vdd)： 2 V ~ 5.5 V
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 8-SOIC（0.154"，3.90mm 寬）
包裝： 管件
產(chǎn)品目錄頁面： 637 (CN2011-ZH PDF)
配用： AC162057-ND - MPLAB ICD 2 HEADER 14DIP
Micrel, Inc.
KSZ8841-PMQL
October 2007
34
M9999-100407-1.5
Bit
Default
Description
25
0
D1 Support
If this bit is set, it indicates that the KSZ8841-PMQL support D1 power
state.
The value of this bit loaded from the D1_SUP bit in the EEPROM.
24 - 22
000
Auxiliary Current
This 3-bit field reports the 3.3Vaux auxiliary current requirements for the
PCI function. If PME# generation from D3_cold is not supported by the
function, this field must return a value of 000 when read.
21
0
Device Specific Initialization
Indicates whether special initialization of this function is required (beyond
the standard PCI configuration header) before the generic class device
driver is able to use it.
Note that this bit is not used by some operating systems. Microsoft
Windows and Windows NT, for instance, do not use this bit to determine
whether to use D3. Instead, they use the driver’s capabilities to determine
this.
A “1” indicates that the function requires a device specific initialization
sequence following transition to the D0 uninitialization state.
The value of this bit is loaded from the PME_DSI bit in the EEPROM.
20
0
Reserved
Should be set to 0.
19
0
PME Clock
When this bit is a “1”, it indicates that the function relies on the presence of
the PCI clock for PME# operation. When this bit is a “0”, it indicates that no
PCI clock is required for the function to generate PME#.
The value of this bit is loaded from the PME_CK bit in the EEPROM.
18 - 16
0
Power Management PCI Version
The value of this bit is loaded from the PME_VER[2:0] bits in the
EEPROM.
15 - 8
0x00
Next Item Pointer
Points to the location of the next block of the capabilities list in the PCI
Configuration Space. The value of this field is 0x00, indicating that this is
the last item of the Capability linked list.
7 - 0
0x01
Capabilities ID
PCI Power Management Registers ID. The value of this field is 01h,
indicating that this is the power-management register block.
The following table shows the access rules of the register.
Category
Description
Value after hardware reset
0x40000001 & EEPROM
Write access rules
Write has no effect on the KSZ8841-PMQL
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