參數(shù)資料
型號(hào)： pic12ce674
廠商： Microchip Technology Inc.
英文描述： 8-Pin, 8-Bit CMOS Microcontroller with A/D Converter(具A/D轉(zhuǎn)換器和EEPROM數(shù)據(jù)存儲(chǔ)器的8位微控制器)
中文描述： 8引腳，8位CMOS微控制器與A / D轉(zhuǎn)換器（具的A / D轉(zhuǎn)換器和EEPROM的數(shù)據(jù)存儲(chǔ)器的8位微控制器）
文件頁(yè)數(shù)： 56/112頁(yè)
文件大小： 1205K
代理商： PIC12CE674
PIC12CE67X
DS40181A-page 56
Preliminary
1998 Microchip Technology Inc.
9.5.1
TMR0 INTERRUPT
An overflow (FFh
→
00h) in the TMR0 register will set
flag bit T0IF (INTCON<2>). The interrupt can be
enabled/disabled by setting/clearing enable bit T0IE
(INTCON<5>). (Section 7.0)
9.5.2
INT INTERRUPT
External interrupt on GP2/INT pin is edge triggered:
either rising if bit INTEDG (OPTION<6>) is set, or fall-
ing, if the INTEDG bit is clear. When a valid edge
appears on the GP2/INT pin, flag bit INTF
(INTCON<1>) is set. This interrupt can be disabled by
clearing enable bit INTE (INTCON<4>). Flag bit INTF
must be cleared in software in the interrupt service rou-
tine before re-enabling this interrupt. The INT interrupt
can wake-up the processor from SLEEP, if bit INTE was
set prior to going into SLEEP. The status of global inter-
rupt enable bit GIE decides whether or not the proces-
sor branches to the interrupt vector following wake-up.
See Section 9.8 for details on SLEEP mode.
9.5.3
GPIO INTCON CHANGE
An input change on GP3, GP1 or GP0 sets flag bit
GPIF (INTCON<0>). The interrupt can be enabled/dis-
abled
by
setting/clearing
(INTCON<3>). (Section 5.1)
enable
bit
GPIE
9.6
During an interrupt, only the return PC value is saved
on the stack. Typically, users may wish to save key reg-
isters during an interrupt i.e., W register and STATUS
register. This will have to be implemented in software.
Example 9-1 store and restore the STATUS and W reg-
isters. The register, W_TEMP, must be defined in both
banks and must be defined at the same offset from the
bank base address (i.e., if W_TEMP is defined at 0x20
in bank 0, it must also be defined at 0xA0 in bank 1).
The example:
a)
Stores the W register.
b)
Stores the STATUS register in bank 0.
c)
Executes the ISR code.
d)
Restores the STATUS register (and bank select
bit).
e)
Restores the W register.
Context Saving During Interrupts
EXAMPLE 9-1:
SAVING STATUS AND W REGISTERS IN RAM
MOVWF W_TEMP ;Copy W to TEMP register, could be bank one or zero
SWAPF STATUS,W ;Swap status to be saved into W
BCF STATUS,RP0 ;Change to bank zero, regardless of current bank
MOVWF STATUS_TEMP ;Save status to bank zero STATUS_TEMP register
:
:(ISR)
:
SWAPF STATUS_TEMP,W ;Swap STATUS_TEMP register into W
;(sets bank to original state)
MOVWF STATUS ;Move W into STATUS register
SWAPF W_TEMP,F ;Swap W_TEMP
SWAPF W_TEMP,W ;Swap W_TEMP into W
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PIC12CE674/JW 功能描述:8位微控制器 -MCU 3.5KB 128 RAM 6 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
PIC12CE674-04/JM 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:8-Pin, 8-Bit CMOS Microcontroller with A/D Converter
PIC12CE674-04/JW 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:8-Pin, 8-Bit CMOS Microcontroller with A/D Converter and EEPROM Data Memory
PIC12CE674-04/P 功能描述:8位微控制器 -MCU 3.5KB 128 RAM 6 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
PIC12CE674-04/P 制造商:Microchip Technology Inc 功能描述:IC 8BIT CMOS MCU 12CE674 DIP8
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