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| 型號： | pic12ce674 |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | 8-Pin, 8-Bit CMOS Microcontroller with A/D Converter(具A/D轉(zhuǎn)換器和EEPROM數(shù)據(jù)存儲器的8位微控制器) |
| 中文描述： | 8引腳，8位CMOS微控制器與A / D轉(zhuǎn)換器（具的A / D轉(zhuǎn)換器和EEPROM的數(shù)據(jù)存儲器的8位微控制器） |
| 文件頁數(shù)： | 25/112頁 |
| 文件大?。?/td> | 1205K |
| 代理商： | PIC12CE674 |
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1998 Microchip Technology Inc.
Preliminary
DS40181A-page 25
PIC12CE67X
5.0
I/O PORT
As with any other register, the I/O register can be
written and read under program control. However,
read instructions (e.g.,
MOVF GPIO,W
) always read the
I/O pins independent of the pin’s input/output modes.
On RESET, all I/O ports are defined as input (inputs
are at hi-impedance) since the I/O control registers are
all set.
5.1
GPIO
GPIO is an 8-bit I/O register. Only the low order 6 bits
are used (GP5:GP0). Bits 6 and 7 (SDA and SCL) are
used by the EEPROM peripheral. Refer to Section 6.0
and Appendix A for use of SDA and SCL. Please note
that GP3 is an input only pin. The configuration word
can set several I/O’s to alternate functions. When
acting as alternate functions the pins will read as ‘0’
during port read. Pins GP0, GP1, and GP3 can be
configured with weak pull-ups and also with interrupt
on change. The interrupt on change and weak pull-up
functions are not pin selectable. If pin 4 is configured
as MCLR, the weak pull-up is always on. Interrupt on
change for this pin is not set and GP3 will read as '0'.
Interrupt on change is enabled by setting INTCON<3>.
Note that external oscillator use overrides the GPIO
functions on GP4 and GP5.
5.2
TRIS Register
This register controls the data direction for GPIO. A '1'
from a TRIS register bit puts the corresponding output
driver in a hi-impedance mode. A '0' puts the contents
of the output data latch on the selected pins, enabling
the output buffer. The exceptions are GP3 which is
input only and its TRIS bit will always read as '1'.
Upon reset, the TRIS register is all '1's, making all pins
inputs.
Note:
A read of the ports reads the pins, not the
output data latches. That is, if an output
driver on a pin is enabled and driven high,
but the external system is holding it low, a
read of the port will indicate that the pin is
low.
5.3
I/O Interfacing
The equivalent circuit for an I/O port pin is shown in
Figure 5-2. All port pins, except GP3 which is input
only, may be used for both input and output
operations. For input operations these ports are non-
latching. Any input must be present until read by an
input instruction (e.g.,
MOVF GPIO,W
). The outputs are
latched and remain unchanged until the output latch is
rewritten. To use a port pin as output, the
corresponding direction control bit in TRIS must be
cleared (= 0). For use as an input, the corresponding
TRIS bit must be set. Any I/O pin (except GP3) can be
programmed individually as input or output.
FIGURE 5-1:
EQUIVALENT CIRCUIT
FOR A SINGLE I/O PIN
Note:
On a Power-on Reset, GP0, GP1, GP2,
GP4 are configured as analog inputs and
read as '0'.
Note 1: I/O pins have protection diodes to V
DD
and V
SS
.
GP3 is input only with no data latch and no
output drivers.
Data
Bus
Q
D
Q
CK
Q
D
Q
CK
P
N
WR
Port
TRIS ‘f’
Data
Latch
TRIS
Latch
RD Port
V
SS
V
DD
I/O
pin
(1)
W
Reg
Reset
TABLE 5-1:
SUMMARY OF PORT REGISTERS
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
Power-on
Reset
Value on
all other
Resets
85h
TRIS
—
—
GPIO Data Direction Register
--11 1111
--11 1111
81h
OPTION
GPPU
INTEDG
T0CS
T0SE
PSA
PS2
PS1
PS0
1111 1111
1111 1111
03h
STATUS
IRP
(1)
RP1
(1)
RP0
TO
PD
Z
DC
C
0001 1xxx
000q quuu
05h
GPIO
SCL
SDA
GP5
GP4
GP3
GP2
GP1
GP0
11xx xxxx
11uu uuuu
Legend: Shaded cells not used by Port Registers, read as ‘0’, — = unimplemented, read as '0',
x
= unknown,
u
= unchanged,
q = see tables in Section 9.4 for possible values.
Note 1: The IRP and RP1 bits are reserved on the PIC12CE67X, always maintain these bits clear.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PIC12CE674/JW | 功能描述:8位微控制器 -MCU 3.5KB 128 RAM 6 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| PIC12CE674-04/JM | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:8-Pin, 8-Bit CMOS Microcontroller with A/D Converter |
| PIC12CE674-04/JW | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:8-Pin, 8-Bit CMOS Microcontroller with A/D Converter and EEPROM Data Memory |
| PIC12CE674-04/P | 功能描述:8位微控制器 -MCU 3.5KB 128 RAM 6 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| PIC12CE674-04/P | 制造商:Microchip Technology Inc 功能描述:IC 8BIT CMOS MCU 12CE674 DIP8 |
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