參數資料
型號: PI2EQX5904NJE
廠商: Pericom
文件頁數: 19/23頁
文件大?。?/td> 0K
描述: IC PCIE 2.0 REDRIVER 100LBGA
標準包裝: 1
系列: PCI Express®(PCIe), ReDriver™
類型: 轉接驅動器
驅動器/接收器數: 2/2
規(guī)程: PCIe? 2.0
電源電壓: 1.2V
安裝類型: 表面貼裝
封裝/外殼: 100-BGA
供應商設備封裝: 100-LBGA(11x11)
包裝: 托盤
5
www.pericom.com
PS-0.5
10/18/10
All trademarks are property of their respective owners.
PI2EQX5904
5.0Gbps 4-Lane PCIe 2.0 ReDriver with Equalization & Emphasis
Equalizer Configuration
The PI2EQX5904 input equalizer compensates for signal attenuation and Inter-Symbol Interference (ISI) resulting from long signal
traces or cables, vias, signal crosstalk and other factors, by boosting the gain of high-frequency signal components. Because either
too little, or too much, signal compensation may be non-optimal eight levels are provided to adjust for any application.
Equalizer configuration is performed in two ways determined by the state of the MODE pin. When the device first powers up, the
SELx_[A:B] input pins are read into the appropriate control registers to set the equalization characteristic. If the MODE pin is low,
reprogramming of these control registers via I2C is allowed.
Each group of four channels, A and B, has separate equalization control, and all four channels within the group are assigned the
same configuration state. The Equalizer Selection table below describes pin strapping options and associated operation of the
equalizer. Refer to the section on I2C programming for information on software configuration of the equalizer.
Equalizer Selection
SEL2_[A:B]
SEL1_[A:B]
SEL0_[A:B]
@1.25GHz
@2.5GHz
0
0.5dB
1.2dB
0
1
0.6dB
1.5dB
0
1
0
1.0dB
2.6dB
0
1
1.9dB
4.3dB
1
0
2.8dB
5.8dB
1
0
1
3.6dB
7.1dB
1
0
5.0dB
9.0dB
1
7.7dB
12.3dB
Output Configuration
The PI2EQX5904 provides flexible output strength and emphasis controls to provide the optimum signal to pre-compensate for
losses across long trace or noisy environments so that the receiver gets a clean eye opening. Control of output configuration is
grouped for the A and B channels, so that each channel within the group has the same setting.
Output configuration is performed in two ways depending on the state of the MODE pin. When the device first powers up, the
Sx_[A:B], and Dx_[A:B] input pins are read into the appropriate control registers to set the power-on state. If the MODE pin is low,
reprogramming of these control registers via I2C is allowed.
The Output Swing Control table shows available configuration settings for output level control, as specified using the Sx_y pins and
registers.
10-0217
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