參數(shù)資料
型號: PHX3055E
廠商: NXP SEMICONDUCTORS
元件分類: JFETs
英文描述: N-channel TrenchMOS transistor
中文描述: 9 A, 60 V, 0.15 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-220
封裝: PLASTIC, TO-220F, 3 PIN
文件頁數(shù): 2/8頁
文件大?。?/td> 96K
代理商: PHX3055E
Philips Semiconductors
Product specification
N-channel TrenchMOS
transistor
PHX3055E
AVALANCHE ENERGY LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
E
AS
Non-repetitive avalanche
energy
CONDITIONS
Unclamped inductive load, I
= 3.3 A;
t
p
= 220
μ
s; T
j
prior to avalanche = 25C;
V
25 V; R
GS
= 50
; V
GS
= 10 V; refer
to fig:15
MIN.
-
MAX.
25
UNIT
mJ
I
AS
Peak non-repetitive
avalanche current
-
9
A
THERMAL RESISTANCES
SYMBOL PARAMETER
R
th j-hs
Thermal resistance junction
to heatsink
R
th j-a
Thermal resistance junction
to ambient
CONDITIONS
TYP.
-
MAX.
6
UNIT
K/W
55
-
K/W
ELECTRICAL CHARACTERISTICS
T
j
= 25C unless otherwise specified
SYMBOL PARAMETER
V
(BR)DSS
Drain-source breakdown
voltage
V
GS(TO)
Gate threshold voltage
CONDITIONS
V
GS
= 0 V; I
D
= 0.25 mA;
MIN.
55
50
2.0
1.1
-
-
-
1.5
-
-
-
-
-
-
TYP. MAX. UNIT
-
-
-
-
3.0
4.0
-
-
-
6
120
150
210
263
3.2
-
10
100
0.05
10
-
100
5.8
-
1.5
-
3.2
-
V
V
V
V
V
T
j
= -55C
V
DS
= V
GS
; I
D
= 1 mA
T
j
= 150C
T
j
= -55C
R
DS(ON)
Drain-source on-state
resistance
Forward transconductance
Gate source leakage current V
GS
=
±
10 V; V
DS
= 0 V
Zero gate voltage drain
current
Total gate charge
Gate-source charge
Gate-drain (Miller) charge
V
GS
= 10 V; I
D
= 5.5 A
m
m
S
nA
μ
A
μ
A
nC
nC
nC
T
j
= 150C
g
fs
I
GSS
I
DSS
V
DS
= 25 V; I
= 5.5 A
V
DS
= 55 V; V
GS
= 0 V;
T
j
= 150C
Q
g(tot)
Q
gs
Q
gd
t
d on
t
r
t
d off
t
f
L
d
L
s
I
D
= 10 A; V
DD
= 44 V; V
GS
= 10 V
Turn-on delay time
Turn-on rise time
Turn-off delay time
Turn-off fall time
Internal drain inductance
Internal source inductance
V
DD
= 30 V; R
D
= 2.7
;
R
= 5.6
; V
GS
= 10 V
Resistive load
-
-
-
-
-
-
3
10
35
15
20
-
-
ns
ns
ns
ns
nH
nH
26
8
10
4.5
7.5
Measured from drain lead to centre of die
Measured from source lead to source
bond pad
V
GS
= 0 V; V
DS
= 25 V; f = 1 MHz
C
iss
C
oss
C
rss
Input capacitance
Output capacitance
Feedback capacitance
-
-
-
190
55
40
250
80
50
pF
pF
pF
August 1999
2
Rev 1.000
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