參數(shù)資料
型號: PHP130N03LT
廠商: NXP SEMICONDUCTORS
元件分類: JFETs
英文描述: TrenchMOS transistor Logic level FET
中文描述: 75 A, 30 V, 0.006 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-220AB
封裝: PLASTIC, TO-220AB, 3 PIN
文件頁數(shù): 3/6頁
文件大小: 51K
代理商: PHP130N03LT
Philips Semiconductors
Product specification
TrenchMOS
transistor
Logic level FET
PHP130N03LT, PHB130N03LT
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
T
j
= 25C unless otherwise specified
SYMBOL PARAMETER
I
S
Continuous source current
(body diode)
I
SM
Pulsed source current (body
diode)
V
SD
Diode forward voltage
CONDITIONS
MIN.
-
TYP. MAX. UNIT
-
75
A
-
-
240
A
I
F
= 25 A; V
GS
= 0 V
I
F
= 75 A; V
GS
= 0 V
I
F
= 75 A; -dI
/dt = 100 A/
μ
s;
V
GS
= -10 V; V
R
= 25 V
-
-
-
-
0.85
1.0
100
0.6
1.2
-
-
-
V
t
rr
Q
rr
Reverse recovery time
Reverse recovery charge
ns
μ
C
AVALANCHE LIMITING VALUE
SYMBOL PARAMETER
W
DSS
Drain-source non-repetitive
unclamped inductive turn-off
energy
CONDITIONS
I
D
= 75 A; V
DD
15 V;
V
GS
= 5 V; R
GS
= 50
; T
mb
= 25 C
MIN.
-
MAX.
500
UNIT
mJ
Fig.1. Normalised power dissipation.
PD% = 100
P
D
/P
D 25 C
= f(T
mb
)
Fig.2. Normalised continuous drain current.
ID% = 100
I
D
/I
D 25 C
= f(T
mb
); conditions: V
GS
5 V
0
20
40
60
80
Tmb / C
100
120
140
160
180
PD%
Normalised Power Derating
120
110
100
90
80
70
60
50
40
30
20
10
0
Tmb / C
0
20
40
60
80
100
120
140
160
180
0
40
60
80
100
120
140
20
ID (A)
Current Derating
Limited by package
January 1998
3
Rev 1.300
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