參數(shù)資料
型號： PHP130N03LT
廠商： NXP SEMICONDUCTORS
元件分類： JFETs
英文描述： TrenchMOS transistor Logic level FET
中文描述： 75 A, 30 V, 0.006 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-220AB
封裝： PLASTIC, TO-220AB, 3 PIN
文件頁數(shù)： 2/6頁
文件大?。?/td> 51K
代理商： PHP130N03LT
Philips Semiconductors
Product specification
TrenchMOS
transistor
Logic level FET
PHP130N03LT, PHB130N03LT
ESD LIMITING VALUE
SYMBOL PARAMETER
V
C
Electrostatic discharge
capacitor voltage, all pins
CONDITIONS
Human body model (100 pF, 1.5 k
)
MIN.
-
MAX.
2
UNIT
kV
THERMAL RESISTANCES
SYMBOL PARAMETER
R
th j-mb
Thermal resistance junction
to mounting base
R
th j-a
Thermal resistance junction
to ambient
CONDITIONS
MIN.
-
TYP. MAX. UNIT
-
0.8
K/W
SOT78 package, in free air
SOT404 package, pcb mounted, minimum
footprint
-
-
60
50
-
-
K/W
K/W
ELECTRICAL CHARACTERISTICS
T
j
= 25C unless otherwise specified
SYMBOL PARAMETER
V
(BR)DSS
Drain-source breakdown
voltage
V
(BR)GSS
Gate-source breakdown
voltage
V
GS(TO)
Gate threshold voltage
CONDITIONS
V
GS
= 0 V; I
D
= 0.25 mA;
MIN.
30
27
10
TYP. MAX. UNIT
-
-
-
-
-
-
V
V
V
T
j
= -55C
I
G
= 1 mA
V
DS
= V
GS
; I
D
= 1 mA
1
1.5
-
-
5
4.5
-
40
0.02
-
0.05
-
92
10
36
2
-
V
V
V
T
j
= 175C
T
j
= -55C
0.5
-
-
-
-
20
-
-
-
-
-
-
-
2.3
6
5
11
-
1
10
10
500
-
-
-
R
DS(ON)
Drain-source on-state
resistance
V
GS
= 5 V; I
D
= 25 A
V
GS
= 10 V; I
= 25 A
V
GS
= 5 V; I
D
= 25 A; T
j
= 175C
V
DS
= 25 V; I
D
= 25 A
m
m
m
S
μ
A
μ
A
μ
A
μ
A
nC
nC
nC
g
fs
I
GSS
Forward transconductance
Gate-source leakage current V
GS
=
±
5 V; V
DS
= 0 V;
T
j
= 175C
I
DSS
Zero gate voltage drain
current
Total gate charge
Gate-source charge
Gate-drain (Miller) charge
V
DS
= 30 V; V
GS
= 0 V;
T
j
= 175C
Q
g(tot)
Q
gs
Q
gd
t
d on
t
r
t
d off
t
f
L
d
L
d
I
D
= 75 A; V
DD
= 24 V; V
GS
= 5 V
Turn-on delay time
Turn-on rise time
Turn-off delay time
Turn-off fall time
Internal drain inductance
Internal drain inductance
V
DD
= 15 V; I
D
= 25 A;
V
= 5 V; R
= 5
Resistive load
-
-
-
-
-
-
45
120
225
100
3.5
4.5
60
170
300
135
-
-
ns
ns
ns
ns
nH
nH
Measured tab to centre of die
Measured from drain lead to centre of die
(SOT78 package only)
Measured from source lead to source
bond pad
V
GS
= 0 V; V
DS
= 25 V; f = 1 MHz
L
s
Internal source inductance
-
7.5
-
nH
C
iss
C
oss
C
rss
Input capacitance
Output capacitance
Feedback capacitance
-
-
-
5000
1150
500
-
-
-
pF
pF
pF
January 1998
2
Rev 1.300
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