參數(shù)資料
型號: PHC20306
廠商: NXP SEMICONDUCTORS
元件分類: 小信號晶體管
英文描述: Complementary enhancement mode MOS transistor
中文描述: 8200 mA, 30 V, 2 CHANNEL, N AND P-CHANNEL, Si, SMALL SIGNAL, MOSFET, MS-012AA
封裝: PLASTIC, SOT96-1, SO-8
文件頁數(shù): 2/8頁
文件大?。?/td> 55K
代理商: PHC20306
1998 Feb 18
2
Philips Semiconductors
Objective specification
Complementary enhancement
mode MOS transistor
PHC20306
FEATURES
Very low on-state resistance
High-speed switching
No secondary breakdown.
APPLICATIONS
Motor and actuator driver
Power management
Synchronized rectification.
DESCRIPTION
One N-channel and one P-channel enhancement mode
MOS transistor in an 8-pin SOT96-1 (SO8) plastic
package.
CAUTION
The device is supplied in an antistatic package.
The gate-source input must be protected against static
discharge during transport or handling.
PINNING - SOT96-1 (SO8)
PIN
SYMBOL
DESCRIPTION
1
2
3
4
5
6
7
8
s
1
g
1
s
2
g
2
d
2
d
2
d
1
d
1
source 1
gate 1
source 2
gate 2
drain 2
drain 2
drain 1
drain 1
Fig.1 Simplified outline and symbol.
handbook, halfpage
MAM118
1
4
5
s1
d1d1
d2d2
g1
s2
g2
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
Per channel
V
DS
drain-source voltage (DC)
N-channel
P-channel
source-drain diode forward voltage
N-channel
P-channel
gate-source voltage (DC)
gate-source threshold voltage
N-channel
P-channel
drain current (DC)
N-channel
P-channel
drain-source on-state resistance
N-channel
P-channel
total power dissipation
30
30
V
V
V
SD
V
GD
= 0; I
S
= 1.25 A
V
GD
= 0; I
S
=
1.25 A
open drain
1
1.3
±
20
V
V
V
V
V
V
V
GSO
V
GSth
V
DS
= V
GS;
I
D
= 1 mA
V
DS
= V
GS
; I
D
=
1 mA
T
s
= 80
°
C
1
1
I
D
8.2
5.6
A
A
R
DSon
V
GS
= 10 V; I
D
= 4 A
V
GS
=
10 V; I
D
=
2.8 A
T
s
= 80
°
C
30
65
3.5
m
m
W
P
tot
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