參數(shù)資料
型號: PEB2466-H
英文描述: LTC3409 Evaluation Kit
中文描述: A-Law/u-Law編解碼器
文件頁數(shù): 62/73頁
文件大?。?/td> 1618K
代理商: PEB2466-H
PEB 2466
PEF 2466
Test Modes
Hardware Reference Manual
53
2001-02-20
9
Test Modes
Each SICOFI
4-μC channel has four test loops that feed the analog input signal back to
the analog output (analog test loops), and five test loops that feed the PCM input signal
back to the PCM output.
Note: The signal path can also be cut off at two different points per receive and transmit
direction.
9.1
Analog Loops
The four analog loops feed signals from the transmit path back into the receive path.
Figure 33
shows the locations of the analog loops.
Figure 33
Analog Loops
Table 34
Analog Loop Programming in Register CR3, Bits 7 to 4
Test-Loops Analog Loops (CR3.7 = 0)
0000
All loops are disabled (normal operation).
0001
ALB-PFI
0011
ALB-4M
0100
ALB-PCM
Analog Loop Back via PREFI-POFI is selected.
Analog Loop Back via 4 MHz is selected.
Analog Loop Back via 8 kHz (PCM) is selected and
in all
channels active
.
(required slope setting in XR6.6, XR6.5 = 00 or 11).
Analog Loop Back via 8 kHz (linear) is selected.
0101
ALB-8K
Receive Path
Transmit Path
Analog
Output
Analog
Input
PCM
Input
PCM
Output
IM1
TH
Digital Gain 2
Digital Gain 2
IM2
Frequency
Response
Digital Gain 1
Frequency
Response
Digital Gain 1
HPX
HPR
ADC
DAC
AGX
AGR
CMP
EXP
A
A
A
A
2466_233
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